Senior Verification Engineer - UVM / SystemVerilog / Python / Perl / Bash / TCL
2 hours ago
Verification Engineer - UVM / SystemVerilog / Python / Perl / Bash / TCL.Are you a Mid to Senior level Senior Verification Engineer looking for you next challenge?.Have experience with SystemVerilog and UVM, plus scripting in Python, Perl, Bash, or TCL?.Want to join a very exciting Spain based semic