CPU Performance Architect
hace 2 días
Granada
ppWe are looking for ab CPU Performance Architect /b to lead performance definition and analysis for embedded‑class processors in Quintauris platforms. You will define performance requirements, develop models, and analyse workloads to inform profile specifications, platform integration, and IP selection. Working closely with our Lead Architect, CPU Architect, and Software/Verification teams, you will ensure Quintauris captures both shareholder and system‑level needs. This role is about defining and validating performance at the architecture level, not IP design, and will play a key role in guiding RISC‑V adoption in embedded domains. /p h3Specific Skills /h3 ul libExperience: /b 8+ years in CPU performance analysis, system architecture, or workload modelling. /li libTechnical Expertise: /b Strong knowledge of embedded CPU microarchitectures, memory hierarchies, and interconnects. /li libModelling Tools: /b Experience with simulation and modelling frameworks (e.g., gem5, QEMU, SystemC, or proprietary fast models). /li libRISC‑V Knowledge: /b Familiarity with RISC‑V ISA, profiles, and compliance frameworks. /li libBenchmarking: /b Experience defining and running benchmarks for embedded, real‑time, or safety‑critical systems. /li libCollaboration: /b Ability to work across hardware, software, and verification teams to capture performance implications. /li libSystem Perspective: /b Understanding of performance trade‑offs in embedded‑class platforms (latency, determinism, throughput, power). /li /ul h3Responsible For /h3 ul libPerformance Definition: /b Define CPU and memory subsystem performance requirements for real‑time, microcontroller, and embedded‑class processors. /li libWorkload Analysis: /b Characterize representative workloads from shareholders and ecosystems to ensure realistic benchmarking. /li libModelling Evaluation: /b Build and use performance models (cycle‑accurate, functional, or fast simulation) to explore architecture trade‑offs. /li libSpecification Input: /b Provide quantitative input to Quintauris profile and platform specifications. /li libIP Qualification: /b Evaluate candidate CPU IPs and platforms against performance requirements and integration constraints. /li libCollaboration: /b Work closely with CPU architects, software leads, and verification teams to align performance with system‑level validation. /li libBenchmarking Strategy: /b Define and oversee benchmarking methodologies to measure CPU and system performance consistently. /li libEcosystem Engagement: /b Collaborate with tool vendors, IP partners, and RISC‑V International on performance‑related requirements and standardisation. /li /ul h3Additional Requirements /h3 ul liStrong analytical and data‑driven mindset /li liClear and persuasive communication of quantitative results /li liCollaborative approach to align diverse stakeholders /li liAbility to translate complex performance data into actionable requirements /li /ul h3Job Nature /h3 pFull Time /p h3Job Location /h3 pGranada (ES), Munich (DE), Remote (DE or ES) /p h3Benefits /h3 ul libHybrid work model /b /li lib30 days of paid vacation /b – Recharge, travel, or simply enjoy more time off. /li libFlexible schedule /b – You own your time; you set the rhythm. /li libAnnual wellness benefit /b – Invest in your health and well‑being with our dedicated allowance. /li libTrust and autonomy /b – We focus on outcomes. /li libGlobal impact /b – Be part of a team shaping the future of processors and the open RISC‑V ecosystem. /li /ul /p #J-18808-Ljbffr