Principal Physical Design Engineer - Analog Devices
5 days ago
Valencia
Overview As Principal Physical Design Engineer, you lead end-to-end physical implementation and signoff of complex SoCs across advanced nodes. You combine RTL-to-GDSII hands-on work with design convergence and team leadership to deliver high-quality silicon in partnership with PD, DFT, Verification, CAD, and signoff teams. You drive timing closure, optimize PPA, and guide a geographically distributed PD team to meet critical milestones. This role offers impact in a high-performance, cross-functional environment on flagship projects. Responsabilidades • Own RTL-to-GDSII implementation, including floorplanning, CTS, routing, EC/verification, ECOs, and STA closure, • Review timing constraints and closure results, guiding PD and Design teams, • Hands-on with Cadence and/or Synopsys PD flows to drive implementation, optimization, debugging, and signoff, • Lead setup/hold timing, IR/EM, congestion resolution, and physical verification to meet PPA targets, • Lead signoff activities including multi-mode/multi-corner STA, DRC/LVS, and power analysis, • Provide leadership for a distributed PD team, coordinating planning, execution, and risk mitigation across locations, • Drive project risk management, communicating trade-offs and status to stakeholders and leadership Requisitos principales, • 10+ years of physical design experience with successful tape-outs on advanced technology nodes, • Hands-on experience with industry-standard physical design and signoff tools, • B.Tech., M.Tech., or higher in Electrical or Electronics Engineering (or equivalent), • Cross-functional collaboration, • Leadership of distributed teams, • Risk assessment and mitigation, • Cadence and/or Synopsys physical design flows, • RTL-to-GDSII implementation, • Floorplanning, CTS, routing