SoC RTL / Design Engineer (Senior Lead)
21 hours ago
Key Responsibilities Design and integrate ARM-based SoC subsystems at RTL level Integrate high-speed IPs including PCIe (Gen5/Gen6), DDR4/DDR5, Ethernet Work with AMBA protocols : AXI, AHB, APB, CHI Perform chip-level integration including IO, clocks, resets, and power domains Run and review static