Physical Design Engineer
19 hours ago
San Jose
Role: Physical Design Engineer Location: San Jose, CA (100% Onsite) Must Have: Synopsys/Cadence EDA Tools, Fusion Compiler, ICC2 Skills: Verilog/VHDL, Synopsys/Cadence EDA Tools, Primetime, ICC2, Fusion Compiler, Python, Perl, Virtuoso Job Responsibility Chip level floor planning, partitioning, t...