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Job Description About Etched Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary Building cutting-edge model-specific ASICs requires crafting custom infrastructure and toolchains to support ultra-fast, reliable, and scalable development across the stack - from simulation to silicon. We build this infrastructure as software - and we engineer it with the same best practices we apply to our products. We use the same rigor, design discipline, and quality standards and testing as we do to our ASIC, software, and platform. You will lead the development and adoption of next-generation infrastructure tooling, enabling Etched ASIC, Software, and Platform engineers to iterate faster, build more reliably, and push the boundaries of AI performance. This includes building and scaling our hybrid high-performance compute (HPC) cluster, optimized for massively parallel CI, EDA workflows, Emulation, and hardware-aware job execution. You’ll also architect and implement a state-of-the-art observability stack with LLM integration and a strong emphasis on streaming health and performance telemetry, log aggregation, distributed tracing, insight generation, synthetic testing, and smart alerting - across CI pipelines, simulation clusters, and service endpoints. This role demands a strong software engineering mindset, quality instincts, and deep understanding of systems. It’s not just about writing scripts - it’s about writing code that builds and manages infrastructure with precision, repeatability, and intent. Key responsibilities * Design and build the orchestration layers that drive our hybrid high-performance clusters—enabling simulation, synthesis, and continuous integration of AI ASICs at unprecedented scale. * Develop and maintain a fully programmable infrastructure control plane to ensure reproducibility, auditability, and rapid iteration across the entire stack. * Create tools and abstractions that empower engineers to harness massive parallelism without worrying about the underlying complexity.. * Prototype and execute workload orchestration and migration strategies between on-premise and cloud environments, balancing performance, storage availability and replication, uptime, and cost across heterogeneous hardware and compute backends. * Implement real-time telemetry, tracing systems that surface insights from millions of metrics, enabling proactive debugging and system optimization. * Build a full observability stack that includes dashboards, alerting, automated responses, and a synthetic testing framework to proactively test infrastructure performance and reliability for various application and data flows, ensuring we remain proactive against issues impacting development and productivity workflows. Representative projects * Design and deploy a fully automated, scalable hybrid HPC cluster, combining bare-metal servers and switches with cloud instances, provisioned through MaaS and orchestrated via SLURM and Kubernetes, optimized for mixed EDA workloads and parallel CI pipelines. * Develop a real-time observability system for ASIC toolchain jobs and distributed builds, integrating Prometheus, Grafana, and VictoriaMetrics with streaming telemetry, tracing, and alerting to detect performance regressions before they hit silicon. * Architect and implement a programmable infrastructure-as-code control plane, using Terraform, Ansible, and Puppet, to version, audit, and redeploy every layer of Etched's development stack with deterministic reproducibility. * Create a zero-downtime interactive development environment that provisions and connects Jupyter and VS Code sessions to GPUs and high-memory nodes via a secure zero-trust network, abstracting away cluster state and machine failures. * Prototype and evaluate dynamic workload migration strategies between on-premise and cloud environments to optimize for latency, reliability, and cost across simulation and synthesis pipelines. * Design a synthetic testing and fault injection framework to validate the behavior of infrastructure under high-load, degraded hardware, and intermittent network partitions - before they happen in production. You may be a good fit if you * Are a systems-minded software engineer who loves building foundational platforms, working close to the metal and cloud, solving high-leverage problems at scale. * Are a deeply technical engineer who treats infrastructure as a software problem - prioritizing clean abstractions, version control,small change lists, easy roll backs, testing, and long-term maintainability over ad hoc configuration. * Have strong programming skills in languages such as Python, Go, Rust, and C++, and are comfortable building production-grade tooling. * Possess expert-level knowledge of Linux, virtualization, containerization, and CI/CD pipelines, with a deep understanding of how to debug, optimize, and scale complex systems. * Are familiar with Infrastructure as Code tools like OpenTofu, Ansible, or Puppet, and enjoy designing declarative, reproducible infrastructure systems. * Understand and use PromQL and other telemetry/query languages and have used LLM to extract insight from real-time metrics, and know how to architect and tune observability stacks. * Have a track record of debugging and resolving difficult hardware-software integration problems across bare-metal systems, networks, and distributed workloads. * Can lead and mentor technical teams, guiding design decisions and helping others develop sound engineering instincts. * Have 8+ years of experience in infrastructure engineering, systems programming, or backend software development - ideally in environments where performance, scale, or hardware interaction mattered. * Are driven by curiosity, take initiative, and have an innate sense of ownership — you thrive in uncharted territory, design for edge cases, and love making systems more powerful, reliable, and elegant. Strong candidates may also have experience with * Familiarity with Bazel build system * Deep understanding of ASIC development flows, especially those involving Synopsys, Cadence, and Verilator, including how EDA tools interact with infrastructure for simulation, synthesis, and verification. * Hands-on experience architecting systems with AWS, GCP, or Azure, including hybrid on-prem/cloud deployments, workload migration strategies, and cloud-native orchestration tooling. * Experience monitoring, provisioning, and debugging bare-metal servers, network hardware, and high-performance storage systems in rack-scale environments. * Comfortable in profiling and optimizing compute environments for single-threaded latency, memory-bound workloads, or I/O throughput, especially in the context of simulation or CI performance. * Proficiency building or operating telemetry systems at scale using Prometheus, Grafana, Loki, VictoriaMetrics, and tools for distributed tracing, log aggregation, and real-time alerting across heterogeneous mediums (SMS, email, push alerts, etc.) Benefits * Medical, dental, and vision packages with generous premium coverage * $500 per month credit for waiving medical benefits * Housing subsidy of $2k per month for those living within walking distance of the office * Relocation support for those moving to San Jose (Santana Row) * Various wellness benefits covering fitness, mental health, and more * Daily lunch + dinner in our office How we’re different Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed. Compensation Range: $150K - $250K

Job DescriptionAbout the Institute of Foundation ModelsWe are a dedicated research lab for building, understanding, using, and risk-managing foundation models. Our mandate is to advance research, nurture the next generation of AI builders, and drive transformative contributions to a knowledge-driven economy. As part of our team, you’ll have the opportunity to work on the core of cutting-edge foundation model training, alongside world-class researchers, data scientists, and engineers, tackling the most fundamental and impactful challenges in AI development. You will participate in the development of groundbreaking AI solutions that have the potential to reshape entire industries. Strategic and innovative problem-solving skills will be instrumental in establishing MBZUAI as a global hub for high-performance computing in deep learning, driving impactful discoveries that inspire the next generation of AI pioneers. The RoleWe are seeking a Recruiting Partner with approximately 8+ years of experience in the technology ecosystem. This is not a typical "recruiter" role; it is a critical operational position that combines high-level PhD/Research Scientist sourcing with the rigorous, high-volume coordination required to scale a top-tier lab.In a high-growth environment, the "bottleneck" is often the schedule. You will be the architect of our candidate experience, ensuring that every interview loop—no matter how complex or cross-continental—runs with "white-glove" precision. Key Responsibilities1. High-Volume Coordination & Scheduling (Primary Focus)- The "Scheduling Engine": Manage the complex, multi-stage interview calendars for all regional and international roles. This includes coordinating across multiple time zones.- Panel Optimization: Work with People Operations and Team Leads to ensure interview panels are balanced, diverse, and technically aligned.-Candidate Experience: Act as the primary point of contact for candidates, ensuring they are briefed, prepared, and supported from initial outreach to offer.2. Full-Cycle Research Recruiting- Strategic Sourcing & Market Mapping: Conduct deep-market research and mapping to identify and engage world-class PhD talent across core and emerging AI domains, including Reinforcement Learning (RL), Post-training, Vision-Language Models (VLM), Diffusion, World Models, and Infrastructure.- End-to-End Search Management: Lead the full recruiting lifecycle from initial intake sessions with hiring managers to final closing. Develop tailored hiring strategies for niche research roles.- Stakeholder Management: Partner directly with Research Leadership and Team Leads to define role requirements, refine job descriptions, and calibrate candidate profiles through regular feedback loops.- Consultative Candidate Management: Serve as a brand ambassador and consultant to candidates, articulating the lab’s unique mission and technical roadmap to convert high-passive talent.3. Talent Operations & Infrastructure- Compliance & Audit Readiness: Ensure all recruiting processes, documentation, and data tracking are fully compliant with federal and state labor laws (e.g., EEO, CCPA, and relevant California labor codes). Maintain an "audit-ready" environment for all hiring records and candidate data.- ATS Mastery: Take full ownership of our Applicant Tracking System. Ensure 100% data integrity, manage the referral pipeline, and provide weekly "Health of the Pipeline" reports to leadership.- Process Building: Evaluate and improve our hiring workflows. You will build the templates and playbooks that allow us to scale significantly.- Brand Ambassadorship: Help represent the lab at top-tier conferences to build our local and global talent brand. Requirements- 8+ Years of Experience: Proven track record in Talent Acquisition, specifically within high-growth AI labs or Tier-1 tech firms.- Research Literacy: You must understand the difference between a "Software Engineer" and a "Research Scientist." Familiarity with the ML research ecosystem and PhD hiring cycles is essential.- Mastery of Complexity: Exceptional organizational skills. You should thrive in the "logistical puzzle" of scheduling multiple complex interview rounds per day without errors.-Communication: Ability to communicate with high-seniority executives and elite academic researchers with professional poise.- Tools: Expert-level proficiency in modern ATS platforms (experience with Lever is a significant plus), LinkedIn Recruiter, and productivity suites. Benefits IncludeGenerous paid time off, sick leave and holidaysEmployee Assistance Program*Life insurance and disability

Job Description About Etched Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary Etched is scaling faster than any other company in the AI hardware space. To match that pace, our internal operations and decision-making systems need to be as innovative as our chips. We’re looking for a Business Automation Engineer to design and build the automation infrastructure that unifies our business intelligence, streamlines cross-functional workflows, and powers data-driven decision-making across GTM, talent, legal, and production operations. This is a hands-on, full-stack engineering role with a business lens. You’ll scope problems directly with stakeholders, architect and ship automation systems end-to-end, and own adoption so your work has immediate impact. What You’ll Do * Build Full-Stack Automation Systems: Design, develop, and deploy robust internal applications and integrations across front-end, back-end, and data pipelines to eliminate manual workflows. * Unify Business Intelligence: Create a single source of truth by integrating metrics from GTM, production, talent, and legal ops into role-specific dashboards with ≤2-click access. * Automate Cross-Functional Workflows: Implement alerting and reporting systems for recruiter pipelines, offer risks, GTM performance, contract tracking, and production forecasting. * Integrate Disparate Systems: Connect tools and data sources (Slack, CRM, HRIS, manufacturing tools, etc.) via APIs and middleware to ensure seamless information flow and real-time visibility. * Deliver Under Pressure: Prioritize aggressively and ship complete, stable systems on fast timelines without sacrificing maintainability. Representative Projects * Talent Ops Automation: Automate candidate pipeline analytics, recruiter performance dashboards, and offer-stage risk alerts. * Unified BI Platform: Build a single integrated suite pulling KPIs from GTM, production, talent, and legal ops with custom dashboards for leadership, managers, and ICs. * Automated GTM & RevOps Reporting: Implement a weekly auto-generated GTM report showing deal activity, trends, and flagged risks/opportunities. * Legal Ops Workflow Automation: Create automated contract tracking and compliance reminders with Slack/email integration. * Production Forecasting Engine: Develop a live production forecast pulling from manufacturing and DV/PD tools and generate variance reports comparing forecast vs. actual delivery. * Unified Performance Management System: Consolidate metrics from all automated workflows into a single layer showing both individual and team-level performance. You May Be a Good Fit If You: * Have strong full-stack development skills and experience shipping end-to-end business applications with clean, maintainable code. * Are comfortable integrating disparate systems and designing resilient, low-maintenance automations that scale with growth. * Think like a business operator: you understand how GTM, production, talent, and legal workflows intersect with company strategy and scope projects for maximum leverage. * Thrive under pressure and can deliver high-impact systems quickly without sacrificing quality. * Operate with high EQ and low ego: you partner effectively across functions, incorporate feedback, and elevate others’ workflows. * Bring intensity and persistence: you treat blockers as puzzles to solve and dive deep into any system or dataset to find leverage. Benefits * Full medical, dental, and vision packages with generous premium coverage * Housing subsidy of $2,000/month for those living within walking distance of the office * Daily lunch and dinner in our office * Relocation support for those moving to San Jose (Santana Row) Base Compensation Range * $150,000 – $225,000 How We’re Different Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs. We are a fully in-person team in San Jose (Santana Row) and expect all of our technical staff to contribute broadly across functions.

Job Description Apogee Global RMS is seeking a Senior Network Engineer who brings technical depth, operational discipline, and a builder’s mindset. This role supports mission‑critical environments across public‑sector and enterprise clients, ensuring reliability, security, and performance at scale for their client. This Network Engineer will design, implement, and optimize network infrastructure while operating with clarity, urgency, and high accountability. This is a high‑impact role with direct visibility to leadership. Key Responsibilities • Architect, configure, and maintain LAN/WAN, routing, switching, and firewall infrastructure, • Manage VPNs, load balancers, wireless networks, and cloud connectivity, • Monitor network performance and troubleshoot complex issues with precision, • Implement network security best practices and support compliance requirements, • Support infrastructure upgrades, migrations, and modernization initiatives, • Document network diagrams, configurations, and operational procedures, • 6+ years of hands‑on experience in network engineering or infrastructure operations, • Strong expertise with Cisco, Juniper, Palo Alto, Fortinet, or equivalent platforms, • Deep understanding of routing protocols (BGP, OSPF, EIGRP) and switching technologies, • Experience with firewalls, VPNs, IDS/IPS, and network segmentation, • Familiarity with cloud networking (AWS, Azure, or GCP), • Ability to troubleshoot complex environments with clarity and speed, • Excellent communication, documentation, and stakeholder‑management skills Preferred Qualifications • Relevant certifications (CCNA/CCNP, JNCIS/JNCIP, PCNSE, Network+), • Experience supporting public‑sector or regulated environments Why Apogee • High‑performance culture grounded in ethics, excellence, and operational rigor, • Direct impact on national‑scale infrastructure programs, • Leadership visibility and opportunities for accelerated growth, • A team that values accountability, craftsmanship, and continuous improvement How to Apply For any questions (OR) to apply, please contact us at .

Job DescriptionSalary: $140,000 - $170,000 Credo is engineering the future of high-speed connectivity for the AI-driven world.With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers. Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure. At Credo, youll be part of a team of world-class technologists and engineers that thrive on pushing the limits of whats possible for some of the worlds most important companies. Our portfolio includes cutting edge solutions including our software,optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables(AECs) all designed for maximum performance, energy efficiency, and scalability. We foster a culture oftechnical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale. Join us and help us architect the next generation of disruptive networking technologies because at Credo, We Connect. About the Role As a Senior Physical Design Engineer, you will manage all aspects of physical design and implementation for Credo SoC designs. This role involves close collaboration with the local frontend team and PD/integration teams in China and Taiwan to ensure successful tapeouts. Responsibilities • Lead and drive top-level, IP, and block-level physical implementation from RTL to GDSII., • Focus on timing, power, and area (PPA) optimization for high-speed SerDes and interconnect subsystems., • Establish and maintain physical design methodologies, flow automation, chip floorplanning, power/clock distribution, chip assembly, P&R, and timing closure., • Perform static timing analysis, power and noise analysis, and physical verification., • Collaborate closely with frontend and integration teams to ensure successful tapeouts. Basic Qualifications • BS/MS in EE/CS with 10+ years of hands-on experience in back-end physical design and verification. Familiar with hierarchical physical design strategies, methodologies., • Proven track records of handling chip level P&R independently and taping out complex SOC chips under tight schedule pressure., • Experience with 5nm and lower technology nodes., • Proven track records of handling chip level P&R independently and taping out complex SOC chips under tight schedule pressure., • Strong proficiency with EDA tools such as Cadence Innovus and Synopsys Fusipn Compiler., • Solid knowledge on static timing analysis (PrimeTime/Tempus), EM/IR-Drop/crosstalk analysis (PTSI/Voltus/Redhawk), extraction (Quantus/StarRC). Preferred Qualifications • Familiarity with DRC, Antenna, LVS, ERC tools like Calibre. The base salary range for this position is $140,000 $170,000 a year. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits. Credo is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis. If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email .

Job DescriptionCoreWeave is The Essential Cloud for AI™. Built for pioneers by pioneers, CoreWeave delivers a platform of technology, tools, and teams that enables innovators to build and scale AI with confidence. Trusted by leading AI labs, startups, and global enterprises, CoreWeave combines superior infrastructure performance with deep technical expertise to accelerate breakthroughs and turn compute into capability. Founded in 2017, CoreWeave became a publicly traded company (Nasdaq: CRWV) in March 2025. Learn more at Mission As CoreWeave continues to solidify its position as the Essential Cloud for AI, we are seeking a visionary Sr. Director of Product, Research Training Infrastructure. This executive leader will own the product strategy and engineering execution for the services that power the most ambitious AI research labs in the world. You will bridge the gap between "the metal" and the researcher, delivering a seamless, high-performance environment where frontier models are born. The Role: Architect of the AI Factory You will lead the product strategy of our Research Training Stack, focusing on the specialized orchestration, evaluation, and iteration tools required for massive-scale pre-training and post-training. This is a mission-critical role at the intersection of high-performance computing (HPC) and cloud-native agility. Core Responsibilities • Frontier Orchestration: Oversee the evolution of SUNK (Slurm on Kubernetes) to provide researchers with deterministic, bare-metal performance through a cloud-native interface., • Holistic Training Services: Beyond Slurm, drive the development of next-generation orchestrators and automated training-based evaluation frameworks that ensure model quality throughout the lifecycle., • Post-Training Excellence: Build the infrastructure required for sophisticated Reinforcement Learning (RL) and RLHF pipelines, enabling labs to refine foundation models with maximum efficiency., • Customer Advocacy: Act as the primary technical partner for lead researchers at global AI labs, translating their "future-state" requirements into actionable product roadmaps.Requirements: Deep Research & Infrastructure Mastery, • Proven Leadership: 15+ years of experience in engineering leadership, with at least 5+ years managing large-scale infrastructure at a top-tier research lab or an AI-native cloud provider., • Domain Expertise: Deep, hands-on knowledge of Slurm, Kubernetes, and the specific networking requirements (InfiniBand/RDMA) for distributed training clusters., • Research Mindset: You likely come from a background supporting frontier model research (pre-training and post-training) and understand the "pain points" of a research scientist., • Scaling Experience: A track record of delivering mission-critical services on multi-thousand GPU clusters (H100/Blackwell/Rubin architectures)., • Silicon-Up Innovation: Work directly with the latest NVIDIA architectures. The base salary range for this role is $233,000 to $341,000. The starting salary will be determined based on job-related knowledge, skills, experience, and market location. We strive for both market alignment and internal equity when determining compensation. In addition to base salary, our total rewards package includes a discretionary bonus, equity awards, and a comprehensive benefits program (all based on eligibility). What We Offer The range we've posted represents the typical compensation range for this role. To determine actual compensation, we review the market rate for each candidate which can include a variety of factors. These include qualifications, experience, interview performance, and location. In addition to a competitive salary, we offer a variety of benefits to support your needs, including: • Medical, dental, and vision insurance - 100% paid for by CoreWeave, • Company-paid Life Insurance, • Voluntary supplemental life insurance, • Short and long-term disability insurance, • Flexible Spending Account, • Health Savings Account, • Tuition Reimbursement, • Ability to Participate in Employee Stock Purchase Program (ESPP), • Mental Wellness Benefits through Spring Health, • Family-Forming support provided by Carrot, • Paid Parental Leave, • Flexible, full-service childcare support with Kinside, • 401(k) with a generous employer match, • Flexible PTO, • Catered lunch each day in our office and data center locations, • A casual work environment While we prioritize a hybrid work environment, remote work may be considered for candidates located more than 30 miles from an office, based on role requirements for specialized skill sets. New hires will be invited to attend onboarding at one of our hubs within their first month. Teams also gather quarterly to support collaboration. California Consumer Privacy Act - California applicants only CoreWeave is an equal opportunity employer, committed to fostering an inclusive and supportive workplace. All qualified applicants and candidates will receive consideration for employment without regard to race, color, religion, sex, disability, age, sexual orientation, gender identity, national origin, veteran status, or genetic information. As part of this commitment and consistent with the Americans with Disabilities Act (ADA), CoreWeave will ensure that qualified applicants and candidates with disabilities are provided reasonable accommodations for the hiring process, unless such accommodation would cause an undue hardship. If reasonable accommodation is needed, please contact: . Export Control Compliance This position requires access to export controlled information. To conform to U.S. Government export regulations applicable to that information, applicant must either be (A) a U.S. person, defined as a (i) U.S. citizen or national, (ii) U.S. lawful permanent resident (green card holder), (iii) refugee under 8 U.S.C. § 1157, or (iv) asylee under 8 U.S.C. § 1158, (B) eligible to access the export controlled information without a required export authorization, or (C) eligible and reasonably likely to obtain the required export authorization from the applicable U.S. government agency. CoreWeave may, for legitimate business reasons, decline to pursue any export licensing process.

Job Description About SiTime SiTime Corporation is the precision timing company. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power and better reliability. With more than 3 billion devices shipped, SiTime is changing the timing industry. For more information, visit . Job Summary The Networking System Architect serves as the resident networking systems expert with specific focus on datacenter, AI, 5G and communications applications. In this senior technical leadership role, you will use your timing expertise to develop deep technical relationships with key customers and drive architectural level discussions. You will work with product marketing to drive SiTime roadmap and strategy in datacenter and communication applications. You will serve as the product and technical expert for the sales force in support of driving design wins and net revenue. It is not necessary to meet all job requirements to be a qualified candidate for the position. Responsibilities: • Establish deep technical relationships with key customers including system architects and technical management, serving as their trusted advisor on timing, • Synthesize customer feedback and industry trends into solutions and strategies to win at the architectural level, • Drive clock tree and architectural discussions within key application areas that benefit customers at the system level, • Work with marketing to drive SiTime roadmap that intersect future technology trajectories and market disruption, • Lead SiTime industry initiatives, present at conferences and participate in standards activities to influence networking, datacenter, and AI infrastructure communities., • Serve as the technical and product advocate in support of strategic account and reference design partner development, • Develop customer education focused technical collaterals that raise SiTime’s profile as the timing expert Qualifications & Requirements: • BSEE or Bachelor’s degree in technical field; PhD preferred, • Minimum of 15 years of datacenter, networking and/or telecom experience in working either as timing architect or system engineer, • In-depth knowledge of industry standards such as Ethernet, PCI Express, SyncE, UEC, UALink, • Deep understanding of networking architectures and systems, • Deep understanding of timing measurement methodology at both component and system level, • Design and/or applications support experience for networking and timing products, • Standards body experience highly desirable, such as IEEE 802.3, OIF, PCI-SIG, OCP, • Ability to engage in deep technical and architectural discussions with system architects and designers at key system and semiconductor vendors., • Excellent communication skills, deep thinker, creative mindset Desired Characteristics & Attributes: Successful candidate is expected to live by SiTime’s 6 cultural pillars • Leadership: Own ideas and turn them into opportunities and results, • Authenticity: speak your mind and advocate for your beliefs with courage and clarity, • Creativity: imagine the impossible, build strategies and take the leap, • Courage: Embrace risk and pursue outcomes without fear of failure, • Persistence: be relentless in solving problems and overcoming objections, • Teamwork: listen, respect and value diverse perspectives At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent. The final offer is determined by factors such as location, experience, education, and training. The annual base salary range for this role is $188,300.00- $269,280.00. In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success. Benefits offered : 401k plan, health and wellness that includes medical, dental, vision, life, parental leave, legal services, and time off plans. SiTime is an Equal Opportunity Employer. We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law. SiTime participates in the E-Verify program. Learn More about SiTime: Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique. • Innovation on Top – Philosophies of Innovation with Rajesh Vashist, • Fabrication Knowledge – An Interview with Rajesh Vashist, • SiTime Corporation – YouTube #LI-SITIME

Job DescriptionSalary: $140,000 to $170,000 Credo is engineering the future of high-speed connectivity for the AI-driven world.With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers. Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure. At Credo, youll be part of a team of world-class technologists and engineers that thrive on pushing the limits of whats possible for some of the worlds most important companies. Our portfolio includes cutting edge solutions including our software,optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables(AECs) all designed for maximum performance, energy efficiency, and scalability. We foster a culture oftechnical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale. Join us and help us architect the next generation of disruptive networking technologies because at Credo, We Connect. About the Role Were looking for a Senior Digital Design Engineer to lead front-end ASIC design efforts, including architecture, implementation, and verification of complex logic blocks. Youll collaborate across design, verification, and physical teams to ensure successful tape-outs, while contributing to microarchitecture specs, IP integration, and chip bring-up. This role combines technical depth with cross-functional teamwork to deliver high-performance digital solutions. Responsibilities • Write microarchitecture and/or design specifications., • Architect/design, implement, and debug complex logic blocks., • Understand and integrate complex IPs from internal and external IP vendors., • Support all front-end integration activities like Lint, CDC, Synthesis, and ECO., • Develop functional tests/testbenches and run functional RTL and Gate-Level verification/simulations., • Work with other ASIC Design/Verification, DFT and Physical Design Engineers in achieving a successful tape out., • Collaborate with Software, Firmware, Applications, and Systems teams to ensure a high-quality product., • Bring-up, validate, and debug functional features in the chip. Basic Qualifications • BS or MS in Electrical Engineering, Computer Engineering, or related field with 510 years of experience in digital ASIC design, • Strong understanding of digital logic design, including synchronous and asynchronous interfaces, • Proficiency in Verilog/SystemVerilog RTL design, • Experience developing testbenches and test cases for block-level and top-level verification, • Familiarity with UVM methodology, • Hands-on experience with gate-level simulations, chip bring-up, and validation, • Knowledge of synthesis and static timing analysis, • Proficiency in scripting languages such as Python, Tcl, Perl, or Shell, • Strong planning and estimation skills, • Effective communicator and collaborative team player The base salary range for this position is $140,000 $170,000 a year. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits. Credo is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis. If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email .

Job Description Who we are: Persimmons is building the infrastructure that will power the next decade of AI. Founded in 2023 by veteran technologists from the worlds of semiconductors, AI systems, and software innovation, We’re on a mission to enable smarter devices, more sustainable data centers, and entirely new applications the world hasn’t imagined yet. Why join us: We’re growing fast and looking for bold thinkers, builders, and curious problem-solvers who want to push the limits of AI hardware and software. If you're ready to join a world-class team and play a critical role in making a global impact - we want to talk to you. Summary of Role: This role focuses on transforming higher-level MLIR-based large language models by applying sophisticated mid- and backend compiler techniques to target Persimmons.ai's custom accelerator hardware. You will help design and optimize the Persimmons Compiler mid- and backend, integrate it with custom operations and kernels, as well as implement compiler passes that convert higher-level intermediate representations into runtime-oriented code and libraries. This position offers the opportunity to directly shape Persimmons.ai’s innovative AI hardware and software stack through close collaboration with teams across hardware, systems, and software. What you’ll do: • Develop and enhance MLIR-based compiler pipelines targeting Persimmons' custom spatial accelerator hardware., • Design and optimize the Persimmons Compiler mid- and backend techniques for efficient lowering, graph-to-resources mapping, and code generation., • Implement transformations to convert Python, PyTorch, and similar kernel representations to LLVM IR and runtime-ready libraries., • Architect and implement efficient support for SPMD-based, distributed collective operations and lower them through specialized MLIR compiler dialects (e.g., MESH, SHARDY)., • Drive advanced loop optimizations leveraging polyhedral analysis: loop tiling, fusion, interchange, skewing, and related techniques., • Apply and optimize techniques such as bufferization, padding, inlining, and integration of custom operations and kernels within the compilation workflow., • Work on register allocation and instruction scheduling for Persimmons’ spatial hardware, ensuring high resource utilization, throughput, and low latency., • Contribute to graph and tensor partitioning logic for optimal hardware-targeted execution. What You Bring To The Table: • We do not expect candidates to meet all of the requirements listed below; strong candidates will demonstrate expertise in several key areas., • Solid understanding and experience with underlying principles and methods of the MLIR framework (SSA representation, interfaces, rewriting, dialect hierarchy, etc.)., • Hands-on experience with developing MLIR-based compiler infrastructure, algorithms, and techniques for non-GPU/custom spatial hardware architectures., • Working experience with lowering SIMD operations from PyTorch, Triton, xDSL, pyDSL, or similar Python-based frontends toward LLVM IR and, further, to SIMD kernel library., • Extensive experience and understanding of loop optimization based on polyhedral principles., • Experience and understanding of SPMD-based, distributed collective operations, specialized MLIR compiler dialects (e.g., MESH, SHARDY), and collective operation lowering in compilers for spatial hardware., • Experience with techniques such as padding, bufferization, inlining, and other lowering techniques., • Knowledge of register allocation and instruction scheduling in spatial architectures., • Experience in lowering and integration of custom operations and kernels at the compiler mid- and backend., • Familiarity with graph and tensor partitioning and mapping optimization algorithms and their integration in the compiler workflow., • High level of understanding and 5+ years of experience with C++ and appreciation for writing clean and maintainable code. Good knowledge of Python is a big plus., • Competitive salary and benefits package., • Flexible PTO, • 401k Please note: Our organization does not accept unsolicited candidate submissions from external recruiters or agencies. Any such submissions, regardless of form (including but not limited to email, direct messaging, or social media), shall be deemed voluntary and shall not create any express or implied obligation on the part of the organization to pay any fees, commissions, or other compensation. Direct contact of employees, officers, or board members regarding employment opportunities is strictly prohibited and will not receive a response.

Job Description Who we are: Persimmons is building the infrastructure that will power the next decade of AI. Founded in 2023 by veteran technologists from the worlds of semiconductors, AI systems, and software innovation, We’re on a mission to enable smarter devices, more sustainable data centers, and entirely new applications the world hasn’t imagined yet. Why join us: We’re growing fast and looking for bold thinkers, builders, and curious problem-solvers who want to push the limits of AI hardware and software. If you're ready to join a world-class team and play a critical role in making a global impact - we want to talk to you. What you’ll do: As a Senior ASIC Design Verification Engineer, you will be responsible for verifying critical blocks in the Persimmons inference chiplet that will run the smallest to largest AI models. Your primary duties and responsibilities include: • Lead comprehensive verification planning and execution for fabric-level and full-chip designs, ensuring robust validation across all design hierarchies., • Collaborate cross-functionally with architecture, firmware, and design teams to develop detailed test plans that validate implementation against specifications and requirements., • Design and implement advanced testbenches featuring constrained random stimulus generation, intelligent checkers, comprehensive scoreboards, and targeted assertions to ensure design correctness and coverage., • Architect and execute verification strategies encompassing test planning, coverage analysis, automated regression management, and data-driven insights to maximize verification efficiency and quality., • Drive verification excellence through established methodologies including structured code reviews, agile sprint planning, and systematic feature deployment processes. What You Bring To The Table: • Educational Foundation: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related technical discipline., • Proven Experience: 7-10+ years of hands-on verification experience spanning test plan development, simulation environment creation, test implementation, and complex debugging across diverse IP blocks, SoCs, and system-level designs., • Specialized Expertise: Demonstrated proficiency in fabric-level and chip-level verification methodologies and best practices., • Technical Mastery: Advanced skills in SystemVerilog/Verilog, UVM methodology, and C/C++ programming, including embedded code development and validation for RISC-based processors., • Verification Leadership: Established track record in creating scalable verification flows, implementing coverage-driven verification strategies, and developing assertion-based verification frameworks., • Competitive salary and benefits package, • Flexible PTO, • 401k Please note: Our organization does not accept unsolicited candidate submissions from external recruiters or agencies. Any such submissions, regardless of form (including but not limited to email, direct messaging, or social media), shall be deemed voluntary and shall not create any express or implied obligation on the part of the organization to pay any fees, commissions, or other compensation. Direct contact of employees, officers, or board members regarding employment opportunities is strictly prohibited and will not receive a response.

Job DescriptionSalary: $210,000 $240,000 per year Credo is engineering the future of high-speed connectivity for the AI-driven world.With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers. Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure. At Credo, youll be part of a team of world-class technologists and engineers that thrive on pushing the limits of whats possible for some of the worlds most important companies. Our portfolio includes cutting edge solutions including our software,optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables(AECs) all designed for maximum performance, energy efficiency, and scalability. We foster a culture oftechnical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale. Join us and help us architect the next generation of disruptive networking technologies because at Credo, We Connect. AbouttheRole AsaSr.Manager,ASICDesign,youwillleadateamofengineersindeliveringcomplexASICdesignsfromspecificationtotape-out.Thisrolecoversallaspectsoffront-endASICdesign,includingmicroarchitecture,RTLimplementation,andverificationofcomplexlogicblocks.YouwillcollaboratewithPD,DFT,STA,andintegrationteamstoensuresuccessfultape-outsandpartnerwithsystemteamsforchipbring-upandvalidation. Responsibilities • Leadateamofengineerstodeliverchipsfromspecificationthroughtapeout., • Mentorjuniorengineersondesignmethodologies,verificationflows,andbestpractices., • Developandmaintaindetailedmicroarchitectureanddesignspecifications., • Design,implement,anddebugcomplexlogicblocks., • IntegrateandvalidateIPsfrominternalandexternalvendors., • Supportfront-endintegrationactivities,includingLint,CDC,synthesis,andECOprocesses., • Createfunctionaltestsandtestbenches;performRTLandgate-levelverificationandsimulations., • Collaboratewithverification,DFT,andphysicaldesignteamstoensuresuccessfultapeout., • Bringup,validate,anddebugfunctionalfeaturesonsilicon., • Workcloselywithsoftware,firmware,applications,andsystemsteamstodeliverahigh-qualityproduct. BasicQualifications • MSdegreeinEE/CSwith10+yearsofrelevantexperience., • Deepunderstandingofdigitallogicdesignandcomplexsynchronous/asynchronousinterfaces., • ProficientinVerilog/SystemVerilogRTLdesign., • Knowledgeofsynthesisandstatictiminganalysis., • Experiencedevelopingtestbenchesandtestcases;familiaritywithUVM., • Experiencewithgate-levelsimulations,chipbring-up,andvalidation., • Proventrackrecordofsuccessfulproductiontape-outs., • Hands-onexperiencewithSTAandtimingclosure., • FamiliaritywithDFTmethodologyandphysicaldesignflow. PreferredQualifications • Expertiseinscriptinglanguages(Python,Tcl,Perl,Shell)., • Strongplanningandestimationskills., • Excellentcommunicationandleadershipabilities. The base salary range for this position is $200,000 $230,000 a year. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits. CredoisanEqualOpportunityEmployer.Wearecommittedtocreatinganinclusiveenvironmentforallemployeesandwelcomeapplicantsfromdiversebackgroundswithoutregardtorace,color,religion,gender,sex,sexualorientation,nationalorigin,geneticinformation,age,disability,veteranstatus,oranyotherlegallyprotectedbasis. Ifyouhaveadisabilityorspecialneedthatrequiresaccommodationtonavigateourwebsiteorcompletetheapplicationprocess,.

Job Description Crusoe is on a mission to accelerate the abundance of energy and intelligence. As the only vertically integrated AI infrastructure company built from the ground up, we own and operate each layer of the stack — from electrons to tokens — to power the world's most ambitious AI workloads. When you join Crusoe, you join a team that is building the future, faster. We're in the midst of the greatest industrial revolution of our time. The demand for AI compute is boundless, and power is a bottleneck. We're solving that — with an energy-first approach that makes AI infrastructure better for the world and faster for the people innovating with AI. We're looking for problem-solving, opportunity-finding teammates with a sense of urgency, who believe in the scale of our ambition and thrive on a path not fully paved — people who want to grow their careers alongside a team of experts across energy, manufacturing, data center construction, and cloud services. If you want to do the most meaningful work of your career, help our customers and partners advance their AI strategies, and be part of a high-performing team that believes in each other, come build with us at Crusoe. About the Role: Crusoe Cloud is seeking a Sr. to Senior Staff level Solutions Engineer to work closely with our most strategic enterprise customers deploying AI/ML workloads on Crusoe’s high-performance GPU infrastructure. This is a hands-on, customer-facing role requiring deep technical expertise in Kubernetes, MLOps, and cloud infrastructure. You’ll guide customers through end-to-end deployment—owning the PoC process, optimizing workloads post-sale, and serving as a critical technical voice between our customers and engineering teams. Ideal candidates are passionate about AI infrastructure, fluent in containerized environments, and confident translating workloads across cloud platforms. What You'll Be Working On: * Customer Enablement: Lead technical onboarding and deployment of complex AI/ML workloads with strategic enterprise customers—owning the POC through to post-sales optimization. * Kubernetes + MLOps Focus: Architect and deploy ML workloads using Kubernetes-based stacks (e.g., Ray, Kubeflow) Design infrastructure that balances performance, scalability, and efficiency. * Infrastructure-Centric Thinking: Go beyond abstracted services—deploy and optimize AI/ML workloads directly on Crusoe infrastructure. Ensure performance at the container and hardware level. * Cross-Cloud Translation: Help customers migrate and adapt workloads across AWS, Azure, and GCP. Understand and explain the tradeoffs between cloud-native and Crusoe-native approaches. * Technical Storytelling: Conduct workshops, live demos, and solution reviews. Contribute to case studies, solution briefs, and blog posts that highlight real-world customer success. * Voice of the Customer: Relay feedback to internal engineering and product teams to continuously improve Crusoe’s platform based on real-world implementation experience. What You'll Bring to the Team: * Deep Kubernetes Expertise: 7+ years building and deploying containerized workloads. Experience with Helm, Terraform, Docker, and multi-node orchestration a must. * MLOps Deployment Experience: Demonstrated success deploying ML frameworks (e.g., Ray, MLflow, Airflow) on Kubernetes—especially for inference and model training workflows. * Hands-on Cloud Infrastructure Knowledge:Familiarity with compute, storage, networking, and scaling in AWS, GCP, or Azure. Experience translating workloads across clouds is highly desirable. * Customer-Facing Technical Confidence: Able to navigate stakeholder conversations, gather requirements, lead technical engagements, and support customers in both pre- and post-sales environments. * Strong Linux and CLI Proficiency:Comfortable operating in Linux environments and troubleshooting infrastructure issues via CLI. * Collaborative Energy: Strong communication skills and eagerness to partner cross-functionally with Engineering, Product, and Sales to make customers successful. Bonus Points * Experience with Ray, Kubeflow, or other distributed ML orchestration platforms * Exposure to Slurm, but with a primary focus on containerized MLOps over traditional HPC * Multi-cloud deployment or migration experience (especially AWS ➝ Crusoe transitions) * Content contributions (tech talks, blogs, public case studies) Benefits: * Competitive compensation * Restricted Stock Units * Paid time off & paid holidays * Comprehensive health, dental & vision insurance * Employer contributions to HSA account * Paid parental leave * Paid life insurance, short-term and long-term disability * Professional development & tuition reimbursement * Mental health & wellness support * Commuter benefits (parking & transit) * Cell phone stipend * 401(k) Retirement plan with company match up to 4% of salary * Volunteer time off Compensation Range Compensation will be paid in the range of $175,000 - $250,000 per year + Bonus. Restricted Stock Units are also included in all offers. Compensation to be determined by the applicants knowledge, education, and abilities, as well as internal equity and alignment with market data. Crusoe is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, disability, genetic information, pregnancy, citizenship, marital status, sex/gender, sexual preference/ orientation, gender identity, age, veteran status, national origin, or any other status protected by law or regulation.

Job DescriptionCompany Description About CyberArk CyberArk, a Palo Alto Networks company, is the global leader in identity security, trusted by organizations around the world to secure human and machine identities in the modern enterprise. CyberArk’s AI-powered Identity Security Platform applies intelligent privilege controls to every identity with continuous threat prevention, detection and response across the identity lifecycle. With Identity Security, organizations can reduce operational and security risks by enabling zero trust and least privilege with complete visibility, empowering all users and identities, including workforce, IT, developers and machines, to securely access any resource, located anywhere, from everywhere. Learn more at cyberark.com. Copyright © 2026 CyberArk Software. All Rights Reserved. All other brand names, product names, or trademarks belong to their respective holders. Job Description The Production Engineering team is responsible for building, scaling, and operating the cloud platform for CyberArk’s machine identity security products. Our solutions are trusted by the world’s largest organizations to protect and manage TLS machine identities, SSH machine identities, and code signing identities. As a Staff Production Engineer at CyberArk, you will play a key role in designing and evolving the reliability, scalability, and operational excellence of our cloud platform. You will work across infrastructure, services, and engineering teams to ensure systems are resilient, observable, and able to operate at scale. This role is ideal for engineers who combine strong infrastructure expertise with a systems mindset, and who are comfortable driving improvements across production environments, tooling, and engineering practices. What You’ll Do • Design, build, and evolve highly available cloud infrastructure platforms with a focus on scalability, resilience, and reliability, • Lead improvements across production systems, including performance, availability, and incident response, • Drive and standardize Infrastructure as Code (IaC) practices to improve consistency and reduce operational overhead, • Design and optimize CI/CD pipelines to support fast, secure, and reliable software delivery at scale, • Partner with development teams to improve system reliability, observability, and cloud-native design patterns, • Define and implement monitoring, alerting, and observability strategies across distributed systems, • Lead incident response efforts, including root cause analysis and long-term remediation strategies, • Identify and eliminate operational toil through automation and system improvements, • Mentor engineers and contribute to raising the bar for production engineering practices #LI-JH1 #LI-Hybrid Qualifications What You Bring • 8+ years of experience in DevOps, Platform Engineering, or Site Reliability Engineering (SRE), • Strong experience designing and operating cloud infrastructure on AWS, Azure, or GCP, • Deep expertise managing and scaling Kubernetes environments (EKS, AKS, or GKE), • Strong experience with Infrastructure as Code tools (Terraform, Ansible, or Pulumi), • Proven experience designing and maintaining complex CI/CD systems (Jenkins, GitLab CI, ArgoCD, GitHub Actions), • Strong programming/scripting skills (Python, Go, or similar) for automation and tooling, • Experience operating in high-scale, 24/7 production environments with ownership of incident response and reliability, • Solid understanding of Linux systems and networking fundamentals (DNS, TCP/IP, load balancing, VPC, mTLS), • Experience implementing DevSecOps practices in cloud environments, • Experience building or improving observability platforms and tooling, • Professional certifications (CKA/CKAD, AWS Solutions Architect, Azure Administrator), • Experience using AI-assisted development tools to improve operational workflows and automation Additional Information CyberArk is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status. The salary range for this position is $181,000–$226,000 per year, plus discretionary bonus and equity, based on individual performance. Base pay may vary depending on job-related knowledge, skills, and experience. The total compensation package includes a comprehensive range of medical, dental, vision, financial, and other benefits.

Job DescriptionSalary: $29 to $34 an hour Credo is engineering the future of high-speed connectivity for the AI-driven world.With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers. Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure. At Credo, youll be part of a team of world-class technologists and engineers that thrive on pushing the limits of whats possible for some of the worlds most important companies. Our portfolio includes cutting edge solutions including our software,optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables(AECs) all designed for maximum performance, energy efficiency, and scalability. We foster a culture oftechnical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale. Join us and help us architect the next generation of disruptive networking technologies because at Credo, We Connect. About the role We are seeking a professional and proactive Senior Office Coordinator to serve as the welcoming face of our office while providing comprehensive administrative support. This role combines front desk responsibilities with facilities management, ensuring our workplace runs smoothly and efficiently. The ideal candidate will be organized, friendly, and capable of managing multiple tasks while maintaining a professional environment for employees, visitors, and vendors. Responsibilities: • Serve as first point of contact for front desk/receptionist duties, greeting guests and managing vendor/visitor sign-in processes, • Provide daily administrative support to office operations and staff, • Maintain office cleanliness and manage supply inventory, • Manage office supply inventory and restocking for both office and breakroom supplies, • Coordinate weekly lunch orders and assist with event planning, • Handle Costco deliveries and manage supply orders to maintain adequate stock levels, • Maintain accurate office site maps and seating arrangements, • Support new hire onboarding and workstation setup, • Assist with vendor and contractor onboarding through financial systems like Coupa for payment processing, • Process check deposits for Credo, • Handle confidential information with discretion and maintain appropriate confidentiality standards Basic Qualifications • High school diploma or equivalent with 1+ years of experience in office administration or facilities coordination., • Experience managing calendars, travel arrangements, and expense reporting., • Strong organizational and multitasking skills., • Professional communication and interpersonal abilities., • Ability to lift up to 40 lbs., • Proficiency with Microsoft Office Suite and basic financial tools., • Demonstrated ability to maintain confidentiality and handle sensitive information. Preferred Qualifications • Bachelors degree in Business Administration, Office Management, or related field., • Familiarity with procurement and financial systems (e.g., Coupa)., • Event planning experience. The base salary range for this position is $29-$34 an hour. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits. Credo is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis. If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email .

Job Description About Etched Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary We are hiring a Performance Profiling Architect to define how performance is understood across next-generation AI accelerator systems. Our ML accelerator platform spans custom silicon, supercomputing software, compiler stacks, runtime libraries, and distributed inference environments. Performance at this scale is no longer a device-level question — it is a high-performance distributed system problem. You will define the performance metrics that connect raw hardware signals to distributed workload context, ML cluster dynamics, pod communication patterns, and emergent bottlenecks. This role requires more than telemetry. You will establish new abstractions, structured counter ontologies, cross-layer event correlation frameworks, distributed time-alignment strategies, and scalable reasoning systems operating across nodes, racks, and clusters. Working at the intersection of hardware design, driver architecture, runtime systems, and ML infrastructure, you will shape how these layers expose and consume performance intelligence. This is a foundational role defining not just tooling, but how our platform reasons about efficiency, scalability, and system behavior for years to come. Key Responsibilities System-Level Performance Design * Define the architectural approach for collecting and structuring telemetry across CPUs, drivers, interconnects, and multiple accelerators * Design scalable models for correlating performance events across device and host boundaries Cross-Layer Event Correlation * Develop mechanisms to align hardware counters, runtime activity, communication phases, and workload semantics across model-layer execution into coherent, actionable insight * Implement time synchronization and trace-alignment strategies across multi-device systems Telemetry & Counter Modeling * Define structured counter taxonomies separating base signals from derived metrics * Design derived performance models bridging low-level hardware signals and workload-level behavior * Influence instrumentation strategy for future hardware generations Distributed Performance Reasoning * Build tools that identify bottlenecks among multi-accelerator workloads across chips within hosts * Build cluster-scale performance analysis for distributed inference across data center networks Tooling & Insight Delivery * Contribute to analysis engines and developer-facing tooling that transform raw telemetry into intuitive insight * Shape how performance intelligence is surfaced to engineers debugging large-scale AI systems You may be a good fit if you have * Deep experience building complex systems at the intersection of hardware and software * Personally envisioned and built significant portions of profiling, tracing, or observability systems — not solely defined requirements or product strategy * Demonstrated ability to translate raw hardware signals into scalable, production-grade telemetry and analysis infrastructure * Experience correlating time-series events across distributed systems * Deep systems programming expertise (C++ or Rust), with a track record of shipping low-level infrastructure operating close to hardware or runtime systems * Experience designing distributed correlation mechanisms, timestamp-alignment strategies, or performance modeling frameworks across multiple devices or hosts * A history of introducing new technical abstractions or counter models that materially improved how engineers debug and optimize systems * Experience designing distributed tracing or observability platforms at scale * Experience with high-performance computing systems and large AI training clusters * Experience with timestamp synchronization strategies and event alignment in distributed environments * Experience with hardware counter design and instrumentation strategy * Experience with runtime systems, compiler internals, or scheduling frameworks * Experience with performance modeling for large-scale ML workloads * Experience leading cross-functional architectural initiatives spanning hardware and software teams Benefits * Medical, dental, and vision packages with generous premium coverage * $500 per month credit for waiving medical benefits * Housing subsidy of $2k per month for those living within walking distance of the office * Relocation support for those moving to San Jose (Santana Row) * Various wellness benefits covering fitness, mental health, and more * Daily lunch and dinner in our office How we’re different Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs. We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed. Compensation Range: $200K - $300K

Are you passionate about enabling the next generation of AI development? We are looking for an early-in-career Solution Architect to join the growing NVIDIA AI Infrastructure team. Experience with on-prem infrastructure architecture and big cloud deployments. Understand different solutions trade-off

As AI models scale, memory - its capacity, bandwidth, cost, and placement - has become the central architectural constraint. Identify break-even conditions and decision criteria across solution approaches; produce architecture briefs and sensitivity analyses ready for executive audiences. Ground eve

You will work with various teams to ensure optimal infrastructure delivery and facilitate migrations.

NVIDIA is looking for an experienced GPU and network systems Solutions Architect & Engineer. Working with NVIDIA AI Native and Consumer Internet customers on large data center GPU server and networking system deployments as Solution Architect Engineer. System level expertise of CPU/GPU server archit

Infrastructure Architect / Micro Architect. We are seeking a Senior Member of Technical Staff (SMTS) SoC Architect to define and drive architecture for Adaptive SoC and FPGA platforms. You are passionate about complex Adaptive SoC architecture and thrive in environments that require cross‑domain e

The role involves substantial responsibilities in building infrastructure and systems at scale, requiring over 10 years of experience in software design and a background in leading technical teams.

JS, Golang, and React frontend (React 18 + TypeScript + Vite), and AWS infrastructure, contributing directly to production code while helping improve workflows, documentation, and processes. Experience in a multi-service/microservices-style architecture. Experience with Infrastructure as Code (espec

Senior Infrastructure Engineers are expected to have a broad understanding of infrastructure technologies, but responsibilities may be primarily focused on a specific infrastructure area. The Senior Infrastructure Engineer provides advanced technical expertise within the Managed Services organizatio

We are seeking an experienced and versatile Senior Cloud and Infrastructure Engineer to join our Platform and Infrastructure Operations Team. AWS Certified Solutions Architect, Azure Solutions Architect Expert). Lead long-term strategy, technology roadmap planning, and capacity planning to ensure th

The Networking team within Airbnb’s Cloud Infrastructure org owns the entire Airbnb production network infrastructure. You will contribute to the key infrastructure components that connect all Airbnb users and services across the globe. You will have the chance to define and influence large infras

We are seeking a Middle Cloud Infrastructure Engineer to own and evolve a predominantly Azure-based infrastructure environment. You are eager to learn and improve infrastructure processes. Gain experience with enterprise-scale systems and infrastructure.

The Data Warehouse Infrastructure team is responsible for the foundational big data infrastructure, which is used by hundreds of engineers to collect, manage, and analyze data at scale. Architect, design, and implement Airbnb's next-generation big data compute platform to support data ETL, analytics

Strong experience building and operating scalable, distributed systems on cloud infrastructure such as AWS or similar. Your Role: Software Engineer - Platform / Core Infrastructure. This is a role for someone who sees infrastructure as a product, loves clean abstractions, and knows how to dig into p

Experience with game technology infrastructure development and/or game engine development. World Engine leverages a novel sharded rollup blockchain architecture, which allows games to use smart contracts for user-generated content (UGC) while scaling to tens of thousands of concurrent users without

We are seeking a highly experienced Senior Cloud Infrastructure Engineer to implement and support our current and future DNS & Kubernetes architecture in private cloud. You will be directly responsible for ensuring the scalability, resilience, automation, and performance optimization of our DNS

AWS), including tools such as BigQuery, and a good understanding of infrastructure as code (e. Our Data Engineering team builds and maintains the secure, scalable pipelines and infrastructure necessary to process, analyze, and manage our global health data. Core Data Engineering & Infrastructure (Pr

ECS, Lambda, RDS) with a focus on cost-effective, maintainable architecture. Modern DevOps & Python: Proficiency in production-grade Python and modern DevOps practices, including containerization (Docker), CI/CD pipelines, and infrastructure monitoring. You will be the primary architect of how Funga

We are seeking a Senior Azure Infrastructure Engineer / Systems Engineer to design, implement, and support enterprise infrastructure across Azure cloud and hybrid on-prem environments. Automate infrastructure and administrative tasks using PowerShell and/or Azure CLI. Support and optimize hybrid inf

Ramp on AWS architecture, Terraform patterns, Kubernetes setup, CI/CD pipelines, and observability stack. By 90 days: Own an infrastructure domain and raise the bar. A multi-sprint infrastructure delivery that improves system-wide reliability, security, or developer experience.

The Infrastructure team at Clever is responsible for the internal platform used by all engineering teams to build, deploy, and monitor Clever’s products. As a member of the Infrastructure team, you’ll build systems that enable all engineering teams at Clever to build, deploy, and iterate on thei

Injective Labs is seeking an experienced Infrastructure Engineer to help design, build, and operate the core infrastructure powering the protocol. Infrastructure / DevOps / Platform Engineering roles. Developers can rapidly launch premier financial applications suited for mass adoption using Injecti

We’re looking for an Infrastructure Engineer to help bring our Azure infrastructure under Terraform and build the platform our product teams depend on. Support product teams with Azure infrastructure requests. Claude Code, Cursor, GitHub Copilot) to accelerate infrastructure automation and engine

The Infrastructure and Enterprise Systems practice group (IES) at Kraft Kennedy provides strategic guidance, technology planning, and systems design and integration services for organizations of all sizes. Within Kraft Kennedy, the IES is responsible for all cloud and on-premises infrastructure, dat

We recently formed a Traffic Infrastructure team to ensure that traffic across Airtable’s network and routing infrastructure is managed in a reliable, flexible, and secure manner. You have experience in areas such as databases, distributed systems, service-oriented architectures, and data infrastr

The Networking team within Airbnb’s Cloud Infrastructure org owns the entire Airbnb production network infrastructure. You will have the chance to define and influence large infrastructure initiatives such as global traffic load balancing and disaster recovery, next-gen service mesh, cross-region

This role will own deployment, infrastructure automation, observability, and security hardening for a multi-PSP payment architecture. High-Impact Architecture Project. Payments / Fintech / eCommerce Infrastructure.

Manage and evolve our AWS infrastructure using Terraform. Collaborate with product engineering teams to understand their infrastructure needs and reduce friction. Experience with Terraform or similar Infrastructure-as-Code tools.

Architect and evolve distributed systems including storage platforms, streaming infrastructure, and compute orchestration. Software Engineering experience, specifically in backend or infrastructure engineering. As a Software Engineer on our Infrastructure team, you’ll help design, build, and opera

Architect systems that allow games, marketplaces, and user-generated content/platforms to communicate and interoperate seamlessly. Continuously improve and optimize the performance, reliability, and scalability of our infrastructure. Experience with game technology infrastructure development and/or

You’ll contribute to a major platform modernization effort, including migrating the data lake to new underlying data formats, re-architecting high-scale ingestion patterns, and building mechanisms that enable AI/ML use cases on top of the data lake.