Cornelis Networks, Inc.
ASIC Verification Engineer - DV Automation, Infrastructure & AI
4 days ago
San Jose
Job DescriptionSalary: Cornelis Networks delivers the worlds highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the worlds most demanding computational challenges with our next-generation networking solutions. We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles. Cornelis Networks builds world-class SoCs enabling high performance computing, data analytics, and AI interconnect solutions. We are expanding our Design Verification (DV) organization with engineers who are passionate about tooling, flows, automation, and AI/ML that scale verification to first-pass silicon success. We are seeking ASIC Verification Engineers who will own and evolve the tools, flows, automation, and AI capabilities underpinning the entire DV lifecyclefrom UVM testbench bring-up and coverage analytics to large-scale regressions, CI/CD, intelligent triage, and release pipelines. You will collaborate across full-stack software, hardware, RTL design, emulation, and post-silicon teams to deliver robust, reproducible, and data-driven DV at scale. Ideal candidates bring hands-on ASIC DV experience coupled with a strong inclination toward building and operating automation, infrastructure, and AI-assisted developer/debug experiences. Key Responsibilities: • Architect, implement, and maintain DV automation and regression infrastructure, • Build scalable, reliable pipelines for multi-simulator (e.g., VCS, Xcelium, Questa) compilation, elaboration, and execution, • Own coverage collection/merge (UCIS), results triage, flake detection, and auto-bisection workflows, • Implement resource- and license-aware scheduling; optimize throughput and cost, • Own, maintain, and report simulation performance metrics across regression, debug, and coverage workflows, • Apply AI/ML to accelerate DV flows, debug, and triage, • Build high-quality datasets from logs, coverage (UCIS), waves, bug trackers, and metadata; define labeling and data hygiene standards, • Develop models and heuristics for failure clustering, deduplication, auto-classification, and bug-assignment suggestions, • Implement anomaly detection for regressions (e.g., pass-rate drops, performance regressions, license/queue anomalies), • Prioritize and select tests/seeds using coverage- and history-informed ranking; predictively gate changes pre-merge, • Integrate LLMs for log/wave summarization, root-cause hints, and knowledge-base retrieval; surface insights via PR comments, dashboards, or chat interfaces, • Enforce reproducibility and governance for datasets, features, and prompts, • Develop CI/CD and release pipelines for DV, • Track artifacts (binaries, waves, logs), tool/seed manifests, and ensure reproducibility for audits and tapeout, • Define policies for wave capture, retention, and on-demand replay, • Build high-quality tooling and libraries, • Author robust Python/Tcl/Bash utilities, CLI tools, and templates for common DV tasks, • Standardize environment setup (containers/Modules), tool configs, and runbooks, • Integrate lint/CDC/formal flows and quality gates into automated pipelines, • Operate at scale on compute infrastructure, • Integrate with job schedulers (e.g., SLURM/LSF/PBS/SGE) and coordinate with IT/SRE on storage, networking, and license servers, • Containerize EDA environments (Docker/Podman/Singularity) for consistency and portability, • Partner with DV and design engineers, • Support ground-up UVM environment development at block/unit/SoC levels with an emphasis on reusability and instrumentation, • Enable functional/code coverage closure through standardized testbench hooks and metrics, • Improve debuggability via log structuring, automated triage, and viewer integrations (e.g., Verdi/DVE), • Drive observability and continuous improvement, • Publish dashboards for pass rate, coverage, performance, and queue/license health (e.g., Grafana/ELK/Prometheus), • Document flows, teach best practices, and mentor peers on Git/GitHub, automation, and AI-assisted workflows Minimum Qualifications: • Education: BS in EE/CE/CS (or related), • DV and RTL:, • Proficiency in SystemVerilog and UVM; ability to read RTL and debug to the line, • Experience with at least one major simulator (preference Synopsys VCS) and coverage tools (preference Synopsys URG/Verdi), • Automation and Infrastructure:, • Strong scripting (Python and shell); working knowledge of Tcl and Make/CMake or similar build systems, • Hands-on Git and GitHub expertise (Actions, protected branches, PR reviews, CODEOWNERS, required checks), • Experience building and maintaining regression systems and dashboards, • Linux proficiency, including containers (Docker/Podman/Singularity) and environment management (e.g., Lmod/Environment Modules), • Familiarity with job schedulers (SLURM/LSF/PBS/SGE) and license-aware scheduling, • AI for DV (flows, debug, triage):, • Practical experience applying ML/AI or intelligent heuristics to software/EDA operations or DV (e.g., failure clustering, anomaly detection, test prioritization, log summarization), • Proficiency with Python data/ML stack (pandas, NumPy, scikit-learn); ability to build reliable data pipelines from DV artifacts, • Comfort using LLMs via APIs for summarization, retrieval, or assistant workflows, with attention to privacy and IP protection, • Leveling:, • Mid-Level: 5+ years in ASIC DV and/or DV/EDA automation; can autonomously implement features, maintain pipelines, and handle day-to-day operations, • Senior: 810+ years in ASIC DV with significant ownership of DV infrastructure and AI-assisted flows; can architect systems, set standards, and lead cross-functional initiatives Preferred Qualifications: • MS in EE/CE/CS (or related), • Domain experience in high-speed networking: 50G/100G/400G Ethernet MAC/PCS, UDP/TCP/IP, RDMA/RoCE, IPsec, • AI/ML depth for DV:, • LLMs for log/wave summarization and knowledge-base retrieval (RAG), embeddings/vector stores (e.g., FAISS/Milvus), prompt design and evaluation, • MLOps tools (e.g., MLflow/DVC/Kedro/Airflow/Kubeflow), experiment tracking, dataset/version governance, • Experience serving models in CI/CD and at regression scale; monitoring for drift and quality, • Experience integrating lint/CDC/RDC/formal (e.g., SpyGlass/AscentLint, JasperGold/VC Formal) into CI/CD, • Experience with emulation/prototyping (e.g., Palladium, ZeBu, Protium, FPGA) and tying those into regression and AI-assisted triage flows, • Observability stack experience (Grafana/Prometheus/ELK) and metrics-driven operations, • GitHub Enterprise administration, self-hosted runners, and scaling strategies, • Experience with cloud or hybrid HPC for EDA and model serving workloads Location:This is a remote position for employeesresidingwithin the United States We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry. At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives. In addition to your base pay, youll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave. Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.