Hybrid // Physical Design Engineer-ASICs, SoCs, VLSI
5 months ago
Sunnyvale
Hybrid // Physical Design Engineer-ASICs, SoCs, VLSI.Physical Design Engineer-ASICs, SoCs, VLSI.IR drop, EM), and leakage reduction techniques.Chip-Level Floorplanning & Hierarchical Design.Integration of IP & Sub-blocks.Ensure seamless integration of IP blocks and handle complex routing challenges.