Computer system validation jobs in Sunnyvale, CaliforniaCreate job alerts

Competitive pay, benefits, and weekly pay! This Jobot Consulting Job is hosted by: Alex Luhrsen Are you a fit? Easy Apply now by clicking the "Quick Apply" buttonand sending us your resume. Salary: $95,000 - $200,000 per year A bit about us: We are a cutting‑edge technology organization building purpose‑designed systems that dramatically accelerate AI and machine learning workloads. Our teams operate at the intersection of advanced hardware, software, and system design to deliver breakthroughs in performance and efficiency. Job Title: Manufacturing Test Development Engineer Compensation: $90K – $200K/year (based on experience) Location: Sunnyvale, CA Schedule: 1st Shift Type: Long-term contract with potential for full-time conversion Why join us? Competitive medical, dental, vision, and life insurance plans 401(k) access Inclusive, flexible work environment Daily catered meals, healthy snacks, and family-friendly events Job Details We are seeking an experienced Manufacturing Test Development Engineer to design, develop, and deploy manufacturing test solutions for complex, high‑performance hardware systems, from PCB and PCBA through full system‑level test. This role is heavily hands‑on and requires deep experience in hardware validation and PCBA manufacturing environments. Key Responsibilities: Own the design and development of manufacturing test strategies for PCB, PCBA, and system‑level hardware. Develop and support automated manufacturing test solutions used in factory and contract manufacturing environments. Debug and root‑cause hardware, board‑level, and system‑level failures during manufacturing and bring‑up. Work closely with hardware design, validation, manufacturing, and quality teams to ensure test coverage, yield improvement, and manufacturability. Support PCBA manufacturing test, including boundary scan, functional test, and system integration testing. Partner with contract manufacturers on test deployment, sustainment, and issue resolution. Develop test software, GUIs, and supporting infrastructure for manufacturing data collection and traceability. Required Qualifications: Bachelor’s degree in Engineering, Computer Science, or a related technical field. 5+ years of experience in manufacturing test development for hardware products. Proven, hands‑on experience with: - PCB and PCBA manufacturing test - Hardware validation and bring‑up - Test design and test development in manufacturing environments Demonstrated experience supporting PCBA manufacturing lines or contract manufacturers. Strong understanding of manufacturing test automation, including: - Automated functional test - Factory test infrastructure - Test data collection and analysis Experience developing test software using: - Python and/or C/C++ - Linux‑based environments Familiar with test‑related tooling and infrastructure such as: - GUI‑based test tools - Databases (MySQL / SQL) - Cloud‑based systems (e.g., AWS) for test data and automation If this sounds like a good match, please apply online or send your resume directly to Jennifer at https://jobot.com/apply/manufacturing-test-development-engineer/537475287?utm_source=Monster Interested in hearing more? Easy Apply now by clicking the "Quick Apply" button. Jobot is an Equal Opportunity Employer. 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Job Description We are seeking a Medical Device Assembler to support the build and integration of capital medical devices for an upcoming project phase, including validation builds. This role supports a small manufacturing team and focuses on mechanical and electromechanical assembly, sub-assembly, top level chassis integration, and in-process testing. Project Duration: 6–9 months Day Shift: Monday–Thursday, 6:00 AM – 2:30 PM | Friday, 5:00 AM – 1:30 PM **Core Responsibilities • *3 Years of Medical Device, • *Assembly: Build mechanical and electromechanical sub-assemblies and top level chassis following SOPs and work instructions., • *Integration: Integrate sub-assemblies into larger capital systems and system towers; includes plugging in USB, regular power, HDMI, and Ethernet cables. Testing: Perform in-process testing and basic functional checks. Tool Usage: Utilize hand tools such as torque wrenches, screwdrivers, crimping, pliers, and related equipment. No cable building is required Compliance: Strictly follow cGMP and quality-driven procedures; knowledge of ESD is a plus. Communication: Identify and communicate build issues or assembly challenges to supervisor & engineering team. Documentation: Read and interpret assembly drawings; use computers for basic programming, menu navigation, and documentation. Process Improvement: Support continuous improvement by providing feedback on assembly processes. Physical Requirements: Safely lift and handle components weighing up to approximately 50 pounds. **Work Environment Layout: A combination of seated and standing work across the production floor and bench assembly. Attire: No cleanroom suits required. Quality Support: Focus is on in-process testing only; a separate Quality team handles final QC. **Qualifications Requirements Experience: Minimum of 3 years of medical device experience. Background: Background in medical device, mechanical, or electromechanical assembly. Comfort: Comfortable using hand tools and following detailed procedures. Computer Skills: Basic computer skills. Teamwork: Ability to work effectively in a small team environment. Education: High school diploma, GED, or equivalent hands-on manufacturing experience. **Preferred Experience Capital equipment or system-level assembly. Mechanical or electromechanical background. ESD (Electrostatic Discharge) experience is a big plus

In this role you will test and validate firmware and drivers for common firmware interfaces, chipsets, communications protocols and various SoC IPs. You will also implement features to support hardware testing and diagnosis of devices, helping with new technology exploration and proof of concept development. This is a highly multi-functional role, and you'll work closely with various teams, like EE, Systems Engineering, Software Engineering, Hardware Testing, QA, Factory, Manufacturing and Operations. Qualifications 2–8+ years of experience in developing and testing embedded systems/devices System Validation testing experience to validate and debug embedded products (FW/SW) Must have excellent Python test automation experience Understanding and experience with ARM platform and architecture/instruction set. Experience with one or more standard hardware protocols (USB, UART, SPI, I2C, I2S, PCIe) Experience with debuggers such as gdb, lid, etc. Able to comprehend hardware specs and schematics. Experience developing drivers/applications in Unix, Linux, or MacOS Excellent written and verbal communication skills. BS or MS in Computer Engineering, Computer Science, Electrical Engineering or equivalent. Preferred Qualifications Familiar with C++/Objective-C/Swift Submit resume to jobs@OSIengineering.com Location: Cupertino, CA - Onsite 5 days a week, 8 hours per day, no overtime.

Technical Lead Product Engineer San Jose, California, United State s Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more a_o m. Job Descripti on: We are seeking an experienced and hands-on Technical Lead Product Engineer to lead and develop next generation high-speed, high performance and low power semiconductor products in advanced process node. The ideal candidate possesses breadth of industry experience in high-speed product development in the field of product and/or test engineering, can apply fundamentals in circuit, ATE, and test program to aid problem solving, and is a self-driven, result focused go-getter in the pursuit of goals and objecti ves. Basic Qualificat • ions:Minimum of 5 years of experience in the field of post silicon product development dealing with high-speed XCVR (product, test or valida, • tion)Experience in working with PCIe Gen3 and, • aboveHave gone through at least one cycle of full product development life, • cycleStrong academic/technical background in electrical or computer engineering; Bachelor’s is required; MS pref, • erredStrong problem-solving skills that involve system level analysis with test hardware, test program and, • DUT.Digital and analog circuit level understanding for, • DUT.Excellent team player with great communication s, • killsProfessional attitude with the ability to prioritize a dynamic list of multiple tasks Required Exper • ience: Hands on experience with using the Advantest 93k ATE platform with specific skills updating ATE test programs for wafer sort and final test so • lutionsHands-on knowledge of NRZ/PAM4 SerDes protocols like PCIe (Gen3 and above), Ethernet (25G and above), etc. and/or memory interfaces such as (LP), • DDR5/4.Detailed mindset monitoring device ATE test yields, ATE test time, device quality and rolling out new ATE test programs using consiste, • nt BKMsStrong data analysis skills using tools such as JMP or Spotfire calculating limits and drawing conc, • lusionsEnergetic work mindset meeting the demands of shipping quality parts to Astera Labs’ customers through the manufacturing stage of deve lopment Preferred Exp • erience: Working with silicon validation teams to ensure device performance meets production requ • irements.Firmware development in C/C++, scripting in Python, or other equivalent programming ex, • perience.Hands on experience in product/package qual ification

Senior ML Engineer Medical Imaging Evaluation & AI Reliability About the Role: My client is building evaluation and evidence infrastructure for safety-critical AI systems, starting with diagnostic medical imaging. AI systems are increasingly used in settings where their outputs affect clinical decisions and patient outcomes. In medical imaging, benchmark accuracy alone is not enough. Hospitals, regulators, and clinical stakeholders need evidence that models will behave reliably across real-world deployment environments, populations, scanners, and workflows. This role sits at the intersection of: • medical imaging AI,, • model robustness and evaluation,, • regulatory evidence generation,, • and real-world deployment behavior. The work is highly investigative and requires strong technical judgment, scientific reasoning, and the ability to operate effectively in ambiguous environments. The Role This is not a traditional “train models on benchmark datasets” ML role. You will work directly with medical imaging companies and healthcare stakeholders to investigate how AI systems behave in practice and what evidence is required for deployment, regulatory, and clinical decisions. You will: • Design and execute evaluations for medical imaging AI systems, • Investigate model failure modes, robustness, and generalization gaps, • Analyze behavior across populations, scanners, imaging protocols, and clinical settings, • Determine what evidence is sufficient for stakeholders making deployment or regulatory decisions, • Translate technical findings into actionable recommendations for customers and clinical stakeholders, • Build reusable evaluation pipelines, evidence schemas, and model assessment frameworks, • Work with messy, incomplete, and noisy real-world clinical data, • Help shape how evaluation investigations are conducted across the organization The important work is not simply running experiments. It is identifying what questions actually matter, what evidence is missing, and how to generate defensible conclusions under real-world constraints. Required Qualifications: • Strong experience in machine learning for medical imaging (radiology, pathology, cardiology imaging, or related domains), • Experience evaluating or validating real-world ML systems, not just training models, • Deep understanding of:, • model robustness,, • distribution shift,, • uncertainty,, • failure analysis,, • and real-world deployment behavior, • Strong Python skills across the full investigation workflow:, • data analysis,, • experimentation,, • evaluation,, • and reporting, • Experience working with noisy or imperfect clinical datasets, • Ability to communicate technical findings clearly to both technical and non-technical stakeholders, • High tolerance for ambiguity and open-ended investigative work Strongly Preferred: • Experience with FDA-regulated AI/ML systems or medical device submissions (510(k), De Novo, SaMD, etc.), • Experience with medical imaging deployment evaluation or clinical validation, • Experience with interpretability, post-deployment monitoring, uncertainty estimation, or model auditing, • Experience designing reproducible evaluation frameworks or benchmarking systems, • Background in healthcare AI or other safety-critical ML domains, • Customer-facing or cross-functional technical leadership experience, • PhD or equivalent research depth in ML, medical imaging, computer vision, or related areas Ideal Candidate Profile Candidates who tend to succeed in this role often come from backgrounds such as: • Medical imaging ML research, • FDA or healthcare AI evaluation, • Clinical AI validation, • AI robustness and reliability research, • Applied ML investigation in safety-critical environments, • Healthcare-focused computer vision research What Success Looks Like: The strongest people in this role become experts in how medical AI systems behave in the real world. They develop the judgment to answer questions such as: • Where are the model’s true weaknesses?, • Which deployment conditions introduce risk?, • What concerns are real versus theoretical?, • What evidence is sufficient for a hospital or regulator to trust the system?, • What additional validation is required before deployment proceeds?

About Planisware Planisware is a global provider of software solutions for project portfolio management. Planisware solutions are specifically designed to support product development, engineering, and IT business processes. For more than 25 years, Planisware has been helping its customers to achieve strategic and innovative excellence, make valid business decisions, and increase portfolio value. Today, over 1,000 companies worldwide rely on Planisware products to manage their projects, resources, and portfolios. The Role As an Implementation Consultant, your mission is to design, configure, and deploy Planisware solutions to client organizations. Working as part of a team, you will interact regularly with clients to learn their internal processes and understand the needs of their organization. As you gain experience, you will begin to take direct responsibility for critical aspects of the implementation. You will be able to apply your experience and understanding of Planisware's capabilities to transform business requirements first into a comprehensive system design, and then into a functional, high-quality implementation of the Planisware solution. Key Responsibilities • Configure, test, deploy, and support Planisware applications for client organizations., • Support the configuration of standard Planisware modules under supervision., • Assist with data migration, validation, and analysis tasks., • Participate in internal and client-facing meetings to learn and observe., • Help prepare documentation, training content, and system walkthroughs., • Provide post-go-live support, troubleshoot basic issues, and escalate appropriately., • You will be part of a project team, learning directly from experienced consultants and participating in key meetings., • You will become deeply familiar with the business needs and processes of clients. As you become more skilled at understanding business needs and applying Planisware capabilities, you will be able to propose solutions that both meet requirements and facilitate the client's long-term success. What We Expect From You • Curiosity and eagerness to learn Planisware and project delivery practices., • Ability to follow instructions and complete assigned tasks on time., • Willingness to ask questions, receive feedback, and improve continuously., • Dependable collaboration with team members and proactive support on delivery needs. Location This position will be based out of our San Francisco, CA office. Planisware currently has a hybrid policy of working in the office four days per week, with Monday-Thursdays as mandatory days, and remote work allowed on Friday. This is subject to change as the company sees fit. Your Qualifications • BA or BS degree with 2 to 5 years of experience preferred, • Computer programming experience (object-oriented preferred), • Willing to travel (US & International), • Quick learner, efficient multi-tasker, and team player, • Strong written and oral communication skills Preferred Qualifications • Knowledge of portfolio and/or project management, • Working knowledge of database management, • Previous experience in software implementation, • Interest in Pharmaceutical/Biotech/NPD industries Benefits • 3 weeks paid vacation, • Paid holidays, • Up to 4 months maternity leave, • Paternity leave, • Health, dental, and vision insurance, • Life, short and long-term disability insurance, • 401(k) plan with company variable contribution, • Profit sharing, • FSA plan, including employer contribution, • Cell phone and internet allowances, • Company annual kick-off trip, • Quarterly events/monthly happy hour, • Company charitable donation match, • Community outreach, • Tuition assistance program, • Graduate program

Job Title: Test Technician (Electronics/Computer Systems) Location: Milpitas, CA (100% Onsite) Shift: 1st Shift (6:00 AM – 2:30 PM) and 2nd Shift (3:00 PM – 11:30 PM) Pay: $32/hour (2nd shift adds shift differential pay) Job Type: Full-time | Contract-to-Hire | Permanent Benefits: Insurance (Health, Medical, Dental), Paid Holidays, PTO, and More! Overview: We are seeking a hands-on Test Technician to support production of high-performance computer systems (Cerebrus platforms). This role is focused on system-level testing, troubleshooting, and failure analysis within an advanced electronics manufacturing environment. The ideal candidate will have strong component-level debugging skills and experience supporting computing or AI-related hardware in production. Key Responsibilities: • Perform functional testing, troubleshooting, and debugging of computer systems and electronic assemblies, • Conduct failure analysis (FA) to identify root causes and implement corrective actions, • Support production by resolving technical issues quickly to minimize downtime and yield loss, • Work across system levels, including hardware, firmware, and basic software configuration, • Execute test procedures, burn-in processes, and validation protocols to ensure product quality, • Configure systems, including firmware flashing, hardware connections, and system setup, • Document technical issues clearly and communicate findings to engineering and customers, • Collaborate with engineering, quality, and manufacturing teams on process improvements, • Assist with new product introductions (NPI) and test process development, • Support continuous improvement initiatives related to yield, reliability, and efficiency Required Qualifications: • 3+ years of experience in electronics, computing, or AI product manufacturing, • Strong hands-on experience with product testing, debugging, and failure analysis, • Ability to troubleshoot at the component and system level (not just board swapping), • Basic understanding of circuitry and ability to interpret schematics, • Experience working in a production environment supporting high-volume manufacturing, • Proficiency with Microsoft Office (Excel, Word, etc.) for documentation and reporting, • Ability to clearly communicate technical issues both verbally and in writing, • Strong teamwork mindset with willingness to support and mentor others Preferred Qualifications: • Associate’s degree (AA) or higher in Electronics, Engineering Technology, or related field, • Experience with AI hardware, servers, or high-performance computing systems, • Familiarity with test equipment such as oscilloscopes, multimeters, and diagnostic tools, • Experience with firmware flashing, system builds, and disk array configuration Work Environment: • Manufacturing floor environment supporting electronics and computer system production, • Hands-on role requiring use of tools, test equipment, and handling of small components, • Ability to sit, stand, and lift up to 25 lbs as needed Additional Notes: • Immediate interview availability, • High-impact role supporting advanced computing products in a fast-paced environment, • Strong opportunity for long-term conversion Qualified applicants will receive consideration for employment without regard to race, color, age, religion, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or genetic information.

About the Role We are seeking a highly skilled Test Firmware Engineer to join our team and contribute to the development of Design Verification software solutions for PCBAs and ECUs (Electronic Control Units) supporting current and next-generation vehicle platforms. This role offers the opportunity to work closely with cross-functional teams, including Test Engineering, Equipment Engineering, Controls, and Process teams, while owning the software lifecycle from requirements definition through deployment. Key Responsibilities Develop and maintain embedded software solutions for Design Verification of PCBAs and ECUs. Design, implement, and validate firmware for automotive connectivity and vehicle accessory platforms. Support firmware unlock and custom platform solutions for next-generation vehicle programs. Collaborate with hardware, test, controls, and manufacturing teams to deliver robust software solutions. Participate in software architecture, design reviews, debugging, and performance optimization. Develop automated test frameworks and validation tools. Drive software development from specification, implementation, testing, and deployment. Troubleshoot and resolve firmware and system-level issues. Required Qualifications Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, Computer Science, or related field. Strong experience in Embedded Software/Firmware Development. Proficiency in C/C++ programming. Experience with PCBA and ECU testing/validation. Knowledge of embedded systems architecture and hardware interfaces. Experience with debugging tools, test automation, and validation environments. Strong problem-solving and cross-functional collaboration skills. Preferred Qualifications Automotive industry experience. Experience with connectivity modules, vehicle accessories, or automotive ECUs. Familiarity with Design Verification Testing (DVT). Knowledge of CAN, LIN, SPI, I2C, UART, and related communication protocols.

Job Description At Cresa, we believe our clients deserve better. A better space to work, create, build, grow. A better outcome for their people and organization. A better partner who puts their needs first, helping them navigate the landscape, tilting the playing field in their favor and giving them an insider’s edge. Our mission is to find and foster the best environment for every business. Our purpose is to think beyond space - strengthening those we serve and enhancing quality of life for our clients and employees. We are built to champion our clients’ aspirations through real estate. When considering partnership, we strive to connect with those who share our values: Work Together, Create Value, Be Tenacious, Enhance Community, and Embrace Diversity. We believe in being the change. We work together to find new ways of doing things that create value for our clients — and for each other. Because there is not much that feels better than collaborating to make a positive difference each day. At Cresa, we offer an opportunity to be part of something bigger. To learn, advance, mentor and be recognized. Your voice will be heard, and you will be valued for both your individual and team contributions. Job Summary Supports space occupancy planning and data management requests related to low headcount move projects (including individual, transfers, offboards and leaves). Responsible for the lifecycle (open through completion) of SIM-T requests and FMS updates related to desk data corrections, daily services, and individual moves. Accountable for responding to customer requests according to severity within established Key Performance Indicators or Service Line Agreements while maintaining correspondence with end-users, following communication and customer service standards. Responsible for assigned cadenced space audits and reporting findings to facility management and post-occupancy vendor partners to ensure space is captured accurately within customer space management platforms. Supports move and launch projects as needed. *This position is required in office a minimum of 4 days a week. Key responsibilities • SIM ticket management for Daily Service Tickets, Data Corrections, Individual Moves (L7 and below), Onboards/Transfers, Locker Management, • Meet all Service Line Agreement requirements by providing daily correspondence, updates and resolutions for client needs via ticketing system., • Order furniture and desktop technology per customer request and ensure deployment by scheduled date. Quality Control and close out ticket prior to Service Line Agreement expiration., • Manage vendor labor/provider services as appropriate to ensure timely completion of ticket requests, • Responsible for maintaining database of project floor plans, space assignments, occupancy, vacancy and utilization data for assigned sites., • Regular audits of the existing space for changes to architecture, FF&E (Furniture, Fixtures and Equipment) and signage., • Determines and submits actionable requests to responsible vendors, post audit findings, • Develop, prepare and distributes cadenced and requested reports for select business units., • Manages strong multi-level customer contact and relationships and directs space needs., • Manages seat assignments with new hires, transfers, terminations and distribute to client and strategic planning teams as requested., • Performs onsite validation of daily services completion and quality standards, • Ensures systems reflect data accuracy that intersects with multiple programs, • Determines and executes resolution paths for last minute customer requests and escalations at the direction of market service line leader, • Support the integrity and alignment of seat data across multiple platforms, • Manage multiple audit projects and team priorities simultaneously from inception to close out., • Provide measurable and timely response to client inquiries, work requests, and concerns., • Able to read and understand project documents including but not limited to: floor plan drawings, allocation plans and space data management documents and reports., • Maintain accurate seating and headcount data in client’s space management platform, • Periodic evening and weekend work required during high volume, building opening, relocation and employee move projects, • Attend trainings and action on updated process communications, • Other related duties as assigned Qualifications • Minimum of 2-5 years of related experience, • Proficiency with Microsoft Office Suite, Microsoft Project, Microsoft Visio, and other data management software, • Must be able to exchange accurate information at various levels demonstrating the ability to build consensus for decision-making, • Role requires daily communication with client and team members, • Maintains a courteous and professional manner, works well in a team environment Education/Experience • Associate degree or adjacent program completion preferred, • 2-3 years industry or related experience required, • High school diploma or GED required, • Previous space occupancy or data management experience preferred, • Experienced with Computer-Aided Facility Management (CAFM) systems preferred Physical Requirements • Position requires daily on-site attendance at the client site as assigned., • Some travel may be required to integrate, learn, and deliver, • Must be able to move within and between client buildings more than 50% of the day, • Regularly required to sit for long periods of time, • Occasionally required to stand and walk for extended periods, stoop, kneel, crouch, and crawl, • The person in this role needs to be able to occasionally lift up to 25 pounds Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions in accordance with the Americans with Disabilities Act. NOTE: The job description is an overview of the functions and requirements for this position. This document is not intended to be an exhaustive list encompassing every duty and requirement of this position; supervisors may assign other duties as deemed necessary. Cresa is committed to developing and maintaining a diverse workforce. Cresa strongly believes in equal opportunity extended to all individuals in all aspects of the employment relationship without regard to race, color, religion, belief, creed, age, sex, pregnancy or maternity (including childbirth and related conditions), family responsibility (e.g. child care, elder care), nationality, ethnic or national origin or ancestry, citizenship, marital status, civil partner status, sexual orientation, gender identity or expression, transgender status, veteran’s status, genetic information, political view or status as a qualified individual with a disability, protected leave status or any other protected characteristic in accordance with applicable law.

Job Title: Silicon System Validation Engineer Location: Sunnyvale, CA (100% Onsite) Duration: 12+ month Contract Job Description is below Summary: The Reality Labs team is building products that make it easier for people to connect with the ones they love most. We are a team of world-class experts developing and shipping products at the intersection of silicon, hardware, software, and content. The Reality Labs team seeks an AMS Silicon Validation Engineer. As a Silicon System Validation Engineer, you will be part of the RL Silicon Validation team validating high performance silicon and leading the effort to ensure high-quality silicon delivery. Job Responsibilities: • Responsible for SoC and E2E system validation plan development, and execution, • Develop FW tooling for debug and validation, • Understand system HW/SW/FW component as a whole and do test execution and debugging, • Power and performance characterization on pre-silicon platforms and post-silicon validation boards, • Create diagnostic and validation tools to test firmware functionality, performance, and reliability, • Able to work in an agile environment, changing roadmaps and be able to adapt validation plans based on changes. Skills: • Hands-on experience in bring-up and validation of complex SoCs. 3+ years of embedded systems or firmware development experience, • Experience in scripting language like python preferred, ability to read and debug FW/ baremetal code in C, high level of proficiency in C (preferred), • Familiarity with firmware testing frameworks and automation, proficiency with JTAG debuggers, • Basic ability to troubleshoot issues and make system changes as needed to resolve issues, • [Preferred] Knowledge and experience in pre-silicon validation platforms (i.e., FPGA and emulation)., • [Preferred] Proficient in lab instruments such as Oscilloscope, analyzers,, • Good verbal and written communication skills. Basic ability to work independently and manage one’s time. Education/Experience: Bachelor's degree in electrical engineering, computer science or relevant field with minimum 3 years of industry experience. Regards, Hasan Choudhary (Executive Recruiter ) Tel – 908-279-1243 Fax - 732-909-2631 Email - hasan@ClifyX.com

About Zadar Labs Zadar Labs builds next-generation millimeter-wave radar sensing and perception systems for robotics, industrial automation, automotive, and smart infrastructure. Our platform delivers high-resolution, all-weather perception for physical AI systems operating in environments where traditional sensors fall short. We work directly with customers deploying real systems in vehicles, robotics platforms, industrial sites, ports, logistics hubs, and other complex operating environments. Our technology ships into production workflows and is evaluated where performance matters immediately. About the Role We are seeking a hands-on Hardware Systems Engineer to help design, build, test, and scale Zadar radar products. This is a high-ownership engineering role spanning PCB design, hardware bring-up, production support, test fixture development, failure analysis, and supplier coordination. You will work closely with electrical, RF, mechanical, firmware, manufacturing, and customer-facing teams to turn cutting edge millimeter-wave radar designs into robust, manufacturable products. The ideal candidate is a hardware generalist who is comfortable moving between schematic design, lab debugging, production issues, mechanical fixtures, test scripts, and vendor conversations. You do not need to be an expert in every area, but you should be practical, technically curious, detail oriented, and able to drive ambiguous hardware problems to resolution. This role is based onsite in Campbell, California (5 days/week) and includes occasional international travel supporting customer deployments and production. Salary Range: $130,000 - $200,000 What You’ll Do Hardware Design and Product Development • Design and review PCBAs for radar systems, compute modules, and customer support electronics, • Work on high-speed interfaces such as MIPI CSI-2, DDR4/5, and Ethernet, • Support EMI/EMC testing and global compliance efforts across automotive, industrial, and consumer spaces, • Contribute to ruggedized and automotive-oriented designs, including connector selection, grounding, shielding, ESD, EMI, thermal, and mechanical integration considerations, • Work with RF engineering teams to support integration of 60 and 77GHz radar front ends, antennas, RF boards, and system-level hardware, • Work with vendors and leadership to identify opportunities to keep our hardware on the bleeding edge of performance, including new up-and-coming RF frontends, processors, and other radar-specific technologies Bring-Up, Debug, and Failure Analysis • Bring up new hardware in the lab. Debug board-level and system-level issues across power, logic, interfaces, firmware interactions, mechanical integration, and environmental stress, • Perform root-cause analysis on hardware failures from engineering builds, production, HALT, qualification testing, and customer deployments, • Document findings early and drive corrective actions through design, process, supplier, or test improvements Production Ramp and Manufacturing Support • Support prototype builds, EVT/DVT/PVT builds, and production ramp-up, • Work with contract manufacturers, suppliers, and onsite manufacturing to resolve production issues, • Help define assembly processes, inspection criteria, rework instructions, and production controls, • Support supply chain and component selection decisions, including alternates, lifecycle risk, manufacturability, and cost, • Review production data to help improve yield, quality, and repeatability Test Engineering and Fixtures • Design and build simple electrical and mechanical test fixtures for bring-up, calibration, validation, production, and QC, • Develop or modify scripts for automated test, data collection, production screening, and hardware validation, • Help define test coverage, pass/fail criteria, and QC processes for radar products, • Support calibration and end-of-line test workflows, • Help plan, coordinate, and execute environmental and reliability testing, including HALT, thermal cycling, shock/vibe, and other related test activities What We’re Looking For Core Requirements • Fast learner with strong technical intuition, • BS or higher in Electrical Engineering, Computer Engineering, Mechanical Engineering, or a related discipline, • Strong hands-on hardware engineering skills, • Comfortable working across PCB design, lab debug, production support, and system integration, • Ability to work independently in ambiguous environments without rigid playbooks, • Strong ownership, attention to detail, and follow-through Technical Skills Comfortable with several of the following: • Schematic design and PCB layout review, • High-speed digital design and debugging, • Signal and power integrity, • Embedded systems hardware, • Power supply design, • Hardware bring-up and lab debugging, • Linux-based systems and basic command-line workflows, • Python scripting for test automation, • Ethernet, MIPI CSI-2, PCIe, SPI, I2C, UART, CAN, and other embedded interfaces, • Mechanical design in Solidworks of simple jigs, fixtures, brackets, adapters, • Production test, QC processes, and manufacturing documentation Communication and Ownership • Strong communicator with internal engineering teams, suppliers, contract manufacturers, and test labs, • Ability to take ownership and drive issues to resolution independently, • Attention to detail and persistence when working through integration challenges, • Comfortable coordinating across electrical, RF, mechanical, firmware, software, manufacturing, and operations teams Logistics • Based in or willing to relocate to Bay Area, CA, • Full-time onsite presence at our Campbell, CA headquarters is required (5 days per week), • Occasional domestic or international travel may be required to support manufacturing and customer deployments, • Valid passport and US-work authorization required Growth Opportunity This is a high-growth role with a path to: • Own major hardware subsystems across Zadar radar products, • Grow and scale with hardware productization and ramp-up, • Define next-generation radar hardware architectures, • Expand into technical leadership across hardware, manufacturing, test, or systems engineering Strong performance in this role will quickly expand scope and responsibility. Why Zadar • Work on systems that ship and deploy at global scale, • High ownership and direct customer impact, • Small, focused team with fast execution, • Competitive compensation and meaningful equity, • Health, Dental, Vision, FSA/Dependent Care FSA, 401(k), • Daily catered lunch, • Free snacks and beverages in office, • Corporate housing available upon request, • Discounted Bay Club gym membership Equal Opportunity Zadar Labs is an equal opportunity employer committed to building an inclusive and supportive workplace for all employees.

Qualcomm Technologies, Inc. Engineering Group, Engineering Group > Software Engineering General Summary: This position is not eligible for Qualcomm immigration sponsorship. As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Job Overview Create software/firmware test plans, addressing requirements traceability matrix and test coverage, with respect to feature requirements Design, develop, execute and maintain automated software/firmware test suites for the purpose of verifying quality and compliance of Qualcomm products at functional, integration and system levels Manually test, where appropriate, the customer experience of installation and deployment of Qualcomm hardware and software in a mobile, compute and automotive environment. Assist in the creation of a Quality Engineering/Release engineering process with emphasis on continuous integration and continuous deployment Assist in achieving production-level software readiness, implement customer use-cases, workload analysis models, workload creation, and collaborating with other teams on bring-up/debug/diags Focus on ensuring that existing Operating Systems and customer usage environments run well, while identifying strong opportunity for enhancements, from a power and performance perspective. Minimum Qualifications: • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. • 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Preferred Qualifications: 8+ years of experience in Software/Firmware Validation Demonstrated software test engineering in SW/FW engineering with focus on Data Center Servers (minimum 5 years). Strong understanding and experience in software/firmware test automation techniques Extensive experience working with operating systems like Ubuntu Server, RHEL, SUSE, similar or Windows server Work with multiple SW/HW Engineering teams to ensure that all requirements and features of reference platform requirements have been validated at a component, integration, functional and system level Strong programming skills with experience in C and/or Python programming languages Experience developing automated software/firmware test cases for server platforms, supporting bring-up and production SW releases Nice to have: Prior Experience with SW/FW integration at BIOS/UEFI, BMC firmware, Operating System for x86/ARM64/RISC-V 64bit for server platforms. Strong understanding of Server firmware Standards, opensource Implementation and specifications for ARM64-based servers Principal Duties and Responsibilities: • Leverages advanced Software knowledge and experience to design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs., • Analyzes user needs, software requirements, and time and cost constraints to design and customize software for optimal operational efficiency., • Designs and implements software modules for large-scale products and systems., • Participates in and leads design, coding, unit testing, debugging, and integration efforts to ensure projects are completed to specifications and schedules., • Performs complex code reviews and regression tests as well as triages and fixes issues to ensure the quality of code., • Collaborates with individuals outside the software function (e.g., Hardware, Systems, and Test engineers) to ensure solutions work with other components of a specific project., • Writes detailed technical documentation for complex Software projects. Level of Responsibility: • Works under supervision., • Decision-making may affect work beyond immediate work group., • Requires verbal and written communication skills to convey information. May require basic negotiation, influence, tact, etc., • Tasks do not have defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail or call Qualcomm's toll-free number found . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range and Other Compensation & Benefits: $129,300.00 - $193,900.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this _. If you would like more information about this role, please contact _.

We are looking for Sr. ASIC Design Engineer to join our rapidly growing ASIC design team focused on high performance data center infrastructure ASIC design and SOC development. The ideal candidate for this role shares our passion for creating innovative technologies, and thrives in a highly dynamic, fast-paced, results-driven environment. We are looking for highly talented, passionate, and versatile engineers that can create the next generation enterprise data center solutions. Location: San Jose, California Responsibilities: • Develop advanced NAND memory controller with managed power and performance, • IP and/or chip level micro-architectures, implementation, and validation, • Write up micro-architecture and design document and be able to present to customers, • Develop RTL, perform synthesis, lint and CDC check, • Working with customers to trouble shooting, debug, and tune system performance Requirements: • M.S. Electrical Engineering or Computer Engineering with industry experience, • Proven experience of Verilog, System Verilog and C programming, • Experience of high speed memory controller is a big plus, • Must have knowledge of state-of-the-art NAND memory interface, • Knowledge of Embedded Systems and processor architecture is a plus, • Demonstrated ability to resolve customer issues and deliver timely results, • Teamwork spirit and effective communication skills

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. _, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. The Role We are seeking a highly skilled and motivated Manufacturing Bring-up Engineer to join our team. As the Manufacturing Bring-up Engineer you will support our system level bring-up process execution, implementation, and evolution in the manufacturing pipeline. This is a high visibility role that requires strong technical expertise, coordination, and collaboration to deliver our product from manufacturing to the customer. Responsibilities • Support the Cerebras manufacturing bring-up process execution to configure, test, and validate system performance prior to customer shipment, • Collaborate cross-functionally with Asic, SW, Diagnostics, and QA teams to further automate and streamline the workflow for optimal manufacturing efficiency, • Troubleshoot and resolve technical issues during system bring-up across Asic, SW, and QA domains, • Design and implement efficient processes to manage and track system bring-up status and progress, • Track and report on critical bring-up metrics to drive continuous improvement, • Implement further SW automation and efficiencies to effectively scale the manufacturing bring-up process in support of the manufacturing roadmap Skills & Qualifications • BS or MS in EE, ECE, CS or equivalent work experience, • 3+ years of industry experience in an operations environment, • Experience in hardware bring-up and the debug of complex systems, • Working knowledge and experience in Asic bringup and test processes, • Working knowledge of scripting in languages such as Python and/or Perl, • Proven experience in system bring-up and validation of complex computer systems or equivalent technologies, • Understanding of computer system architecture and hardware components, • Proficiency in scripting and automation tools for system bringup, • Excellent problem-solving and communication skills with the ability to work collaboratively in a fast-paced environment, • Very strong coordination and collaboration skills to manage a business-critical workflow directly in support of customer demand Preferred: • Familiarity in creating test and s/w infrastructure at large scale, • Working across global time zones Location Sunnyvale, California/ Bangalore, India/Toronto, Canada. The base salary range for this position is $170,000 to $230,000 annually. Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications. Why Join Cerebras People who are serious about software make their own hardware. At Cerebras we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras: • Build a breakthrough AI platform beyond the constraints of the GPU., • Publish and open source their cutting-edge AI research., • Work on one of the fastest AI supercomputers in the world., • Enjoy job stability with startup vitality., • Our simple, non-corporate work culture that respects individual beliefs. Read our blog: _ Apply today and become part of the forefront of groundbreaking advancements in AI! Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them. This website or its third-party tools process personal data. For more details, click _ to review our CCPA disclosure notice.

Position Overview We are seeking a highly skilled ADK (Assembly Design Kit) Development Engineer to lead the creation, integration, and validation of design enablement infrastructure for 2.5D/3D advanced packaging, including chiplet-based architectures, silicon interposers, and heterogeneous integration technologies. This role is central to enabling next‑generation multi‑die systems by delivering robust ADKs that bridge design, manufacturing, and EDA ecosystems. You will collaborate closely with packaging R&D, process integration, EDA vendors, IP partners, and customer design teams across multiple global sites. Locations: Albany, NY (USA) / Santa Clara, CA (USA) / Tokyo (Japan) / Chitose (Japan) Employment Type: Full-time Department: Design Enablement / Advanced Packaging Technology About Rapidus Rapidus Corporation, founded in 2022, is Japan-led initiative to build a world-class advanced logic semiconductor foundry. With a bold vision to accelerate innovation, we are pioneering cutting-edge logic semiconductor research, development, design, and manufacturing to transform the global semiconductor industry. Key Responsibilities • Develop and maintain Assembly Design Kits (ADKs) for 2.5D/3D packaging technologies, including:, • Package assembly rules, • DRC/LVS rule decks, • Bump/TSV/RDL design constraints, • Thermal/mechanical design guidelines, • Multi-die floorplanning and connectivity models, • Define and implement design methodologies for chiplet-based and heterogeneous integration flows., • Work with EDA vendors (Cadence, Synopsys, Siemens) to enable:, • 3DIC design flows, • System-level co-design (package + die), • Parasitic extraction and signal/power integrity analysis, • Validate ADK quality through:, • Reference design creation, • Automated regression testing, • Cross-tool consistency checks, • Collaborate with process and packaging engineering teams to translate manufacturing constraints into design rules., • Support customer design teams by providing technical guidance, documentation, and issue resolution., • Drive continuous improvement of ADK architecture, automation, and release processes. Required Qualifications • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Materials Science, or related field., • 5+ years of experience in advanced packaging, 3DIC, package design, or design enablement., • Strong knowledge of:, • 2.5D/3D packaging technologies (interposers, chiplets, hybrid bonding, TSV, RDL), • Package design flows using Cadence SIP/Allegro, Synopsys 3DIC Compiler, or Siemens Xpedition, • DRC/LVS rule development and verification, • Hands-on experience with scripting languages (Python, Tcl, SKILL, etc.) for automation., • Understanding of SI/PI/thermal analysis methodologies., • Excellent communication skills and ability to work with cross-functional global teams. Preferred Qualifications • Experience developing PDKs/ADKs or design kits for foundry or OSAT environments., • Knowledge of heterogeneous integration standards (UCIe, BoW, HBM)., • Familiarity with chiplet architecture and multi-die system design., • Experience with packaging manufacturing processes (RDL, micro-bump, hybrid bonding)., • Ability to lead technical discussions with customers and ecosystem partners. What We Offer • Opportunity to shape the design ecosystem for next-generation 2.5D/3D semiconductor technologies., • Collaboration with world-class R&D teams across the US and Japan., • Competitive compensation and benefits., • A fast-moving environment where innovation and technical leadership are valued. Benefits • Comprehensive Health, Dental and Vision coverage, fully at company's expense (no deductibles), • 401k with no employer match

Duration: 7 months (contract to hire) - W2 San Jose, CA [Hybrid - 4 days onsite M-Th; Friday is remote] About the Role HM is seeking a Business Systems Analyst with experience supporting Legal, Compliance, and Enterprise business functions, specializing in Legal application ecosystems including iManage, Zycus, Ironclad CLM, and integrated Salesforce platforms. Proven ability to translate complex legal and regulatory requirements into scalable, compliant technology solutions, partnering closely with Legal, Procurement, Compliance, Sales, and IT teams. Strong background in end to end process orchestration, system integrations, data governance, and audit ready controls. Success in this role requires the ability to operate across business, data, and automation layers—bringing clarity, speed, and measurable outcomes to complex legal workflows. Required Skills • 3-5+ years proven experience across the full Contract Lifecycle Management (CLM) process, including contract intake and authoring, legal review and approvals, execution, and downstream obligation tracking., • 5+ years of Business Systems Analyst experience supporting large scale enterprise applications in a global environment., • Strong experience supporting enterprise Legal application platforms, including iManage for document management, CLM solutions like Ironclad / Zycus / Conga across contract workflows, Salesforce CRM, • Proven ability to use rapid prototyping or AI-assisted development techniques (e.g., Vibe Coding, low code/no code, or similar approaches) to accelerate solution validation and delivery., • Experience working in Agile and iterative delivery environments, including backlog refinement, sprint planning, incremental releases, and rapid feedback loops., • Strong communication skills with the ability to present complex technical concepts clearly and concisely to a variety of audiences., • Comfortable collaborating with business stakeholders to navigate ambiguity, align priorities, and drive outcomes in fast moving environments., • Bachelor’s or Master’s degree in Systems Engineering, Computer Science, Management Information Systems (MIS), Software Engineering or a related field. What You’ll Do • Partner closely with Legal stakeholders to optimize and standardize legal workflows, improving process automation, governance, and cross functional collaboration across Legal, Sales and Finance, • Lead end to end requirements definition to enable standardized contract intake, clause governance and playbooks, approval and e signature workflows, and post execution obligation management., • Design and leverage AI agents and workflow orchestration capabilities to automate complex, end to end business processes with built in governance, exception handling, security and access controls, and operational oversight., • Define and track success metrics to measure cycle time reduction, elimination of manual handoffs, user adoption, and compliance with legal and regulatory requirements., • Assess upstream and downstream impacts across integrated systems, documenting system interactions, data dependencies, integration touchpoints, and exception paths., • Translate legal and compliance requirements into clear functional specifications, including process flows, user stories, and acceptance criteria, ensuring alignment with regulatory, audit, and control standards., • Drive UAT readiness and execution, including test planning, end to end scenario validation, and stakeholder coordination to ensure solutions meet business and Legal expectations., • Collaborate with Development, QA, Information Security, and Enterprise Architecture to deliver solutions that are secure, scalable, and aligned with enterprise standards. Preferred Skills • Experience working in complex, global, and highly integrated enterprise environments., • Experience in the high-tech or semiconductor industry, supporting complex, global and highly integrated business processes., • Experience designing and leveraging AI agents and workflow orchestration to automate end to end business processes., • Salesforce certifications a plus

Job Description About Etched Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary Our electrical engineering interns will work on both hands-on product design and the development of design and validation infrastructure to design boards that will support bleeding edge systems and silicon. Our Platform Team is building the full-stack system that supports Etched Silicon from PCB to Rack. We are seeking interns to work across all aspects of mechanical and electrical engineering to design the future of high power ASIC systems. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have Progress towards a Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or related field Experience building real mechanical systems, boards, or other hands-on projects. Knowledge of board design cycle, high-speed interconnects, power delivery, and system integration. We encourage you to apply even if you do not believe you meet every qualification. Program details 12-week paid internship Generous housing support for those relocating Daily lunch and dinner in our office Based at our office in San Jose, CA Direct mentorship from industry leaders and world-class engineers Opportunity to work on one of the most important problems of our time For any questions, contact internships@etched.com How we’re different Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

Job Description Who We Are Nuro is a self-driving technology company on a mission to make autonomy accessible to all. Founded in 2016, Nuro is building the world's most scalable driver, combining cutting-edge AI with automotive-grade hardware. Nuro licenses its core technology, the Nuro Driver™, to support a wide range of applications, from robotaxis and commercial fleets to personally owned vehicles. With technology proven over years of self-driving deployments, Nuro gives the automakers and mobility platforms a clear path to AVs at commercial scale, empowering a safer, richer, and more connected future. About the Role As a Staff Technical Lead on Onboard Infrastructure, you will help define and build the high-performance, highly reliable foundation of the Nuro Driver. This role spans Device Platform, Performance, and Onboard Systems, requiring deep technical leadership across sensor and compute integration, onboard runtime systems, distributed execution, and autonomy software performance. You will architect hardware-agnostic device interfaces, inter-device communication pipelines, runtime APIs, and onboard software platforms that enable Nuro's autonomy stack to run safely and efficiently across current and future vehicle platforms. You will also lead system-wide performance and reliability efforts, including latency reduction, resource efficiency, observability, automated validation, and tooling for debugging complex onboard systems. This is a highly cross-functional and high-impact role. You will partner with autonomy, hardware, safety, validation, operations, and supplier-facing teams to integrate next-generation sensors and compute platforms, resolve reliability and performance issues, and shape the long-term technical direction of Nuro's onboard infrastructure. We are looking for a technical leader who can operate across team boundaries, align multiple stakeholders, mentor engineers, and deliver robust systems for safety-critical autonomous vehicles. About the Work • Define and drive technical direction for Nuro's onboard infrastructure across Device Platform, Performance, and Onboard Systems., • Architect core onboard systems for embedded compute, sensor integration, runtime frameworks, inter-device communication, and distributed execution across current and future vehicle platforms., • Lead system-level performance and reliability efforts, including latency reduction, resource efficiency, memory management, thread/process lifecycle management, observability, automated testing, and continuous validation., • Build foundational libraries, APIs, tools, and frameworks that enable autonomy and infrastructure teams to develop reliable, low-latency, high-performance software., • Develop onboard distributed systems, including high-performance communication between compute nodes, module orchestration, monitoring, logging, diagnostics, and large-scale autonomy/sensor data pipelines., • Diagnose complex, hard-to-reproduce failures across software, hardware, sensors, compute, networking, and autonomy workloads; drive root cause, mitigation, and long-term prevention., • Partner with autonomy, hardware, safety, validation, operations, and suppliers to define requirements, evaluate and integrate next-generation platforms, and ensure safe, reliable deployment., • Translate ambiguous product, safety, and autonomy needs into scalable technical architecture; align teams on design direction, execution plans, interfaces, and long-term platform strategy., • Mentor engineers, establish engineering best practices, and raise the technical bar across Onboard Infrastructure and partner teams. About You • Master's degree or PhD in Computer Science, Electrical Engineering, Computer Engineering, Robotics, or related field., • 8+ years of software engineering experience building production-quality systems software., • 5+ years of technical leadership experience, including leading complex projects, setting technical direction, and driving cross-team alignment., • Strong proficiency in modern C++, with deep experience in concurrency, multi-threading, debugging, memory management, and performance optimization., • Experience building reliable, high-performance software for robotics, embedded systems, autonomous systems, distributed systems, or other performance-critical platforms., • Strong systems-level expertise, with the ability to reason across operating systems, device interfaces, runtime frameworks, and application-level workloads., • Proven ability to diagnose complex performance, reliability, concurrency, and hardware/software integration issues., • Ability to translate ambiguous requirements into scalable architecture and mentor engineers through design and execution. Bonus Points • Master's degree or PhD in CS, EE, Computer Engineering, Robotics, or a related field., • Experience with robotics hardware, sensors, embedded compute platforms, or autonomous vehicle systems., • Deep knowledge of Linux, device drivers, computer architecture, kernel behavior, and communication protocols such as Ethernet, PCIe, USB, SPI, I2C, or UART., • Experience with high-performance communication, IPC, networking stacks, logging, monitoring, diagnostics, or data collection systems., • Experience with GPU programming, NVIDIA platforms, CUDA, image processing, machine learning infrastructure, or accelerated compute., • Experience working with hardware suppliers or integrating next-generation sensor and compute platforms. At Nuro, your base pay is one part of your total compensation package. For this position, the reasonably expected base pay range is between $235,000 and $352,000 for the level at which this job has been scoped. Your base pay will depend on several factors, including your experience, qualifications, education, location, and skills. In the event that you are considered for a different level, a higher or lower pay range would apply. This position is also eligible for an annual performance bonus, equity, and a competitive benefits package. At Nuro, we celebrate differences and are committed to a diverse workplace that fosters inclusion and psychological safety for all employees. Nuro is proud to be an equal opportunity employer and expressly prohibits any form of workplace discrimination based on race, color, religion, gender, sexual orientation, gender identity or expression, national origin, age, genetic information, disability, veteran status, or any other legally protected characteristics.

The application window is expected to close on: 06/23/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team: The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms-like Silicon One-are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development-from design to qualification to production-is within our team, we're able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. What You'll Do: • Architect, design, and develop BIOS, BSP, and Diagnostics for Cisco Core and Edge routing products., • Design, develop, and test kernel and user space device drivers for FPGA and networking peripherals., • Develop and execute software test plans., • Collaborate with cross-functional teams to debug prototypes and validate software., • Lead technical reviews and discussions across teams. Minimum Qualifications: • Bachelor's degree in Electrical Engineering, Computer Science, or related field with 12+ years experience, or Master's degree with 10+ years experience., • Proficient in C, C++, and Python programming., • Experience with Sonic, ONIE, BMC,IPMIand Redfish technologies., • Strong hardware and device driver development background., • Extensive Linux hardware bring-up experience., • Expertise in multi-threading, event handling, and state machines., • Skilled in device drivers for protocols like I2C, MDIO, SPI, UART, PCIe, GPIO., • Proficient in kernel debugging tools such as GDB and KGDB., • Lead board bring-up, validation, and debugging of embedded systems., • Develop software from concept through delivery for large-scale, high-bandwidth systems., • Troubleshoot software defects from kernel modules to applications. *Collaborative system design, specification writing, and requirements review. *Commitment to quality, mentoring, and continuous learning in networking, optics, and embedded systems. Desired Skills: • AI/ML experience., • Knowledge of Layer 2/3 network protocols., • Strong troubleshooting and debugging skills., • Experience with network processors and optical networking., • Familiarity with secure-boot, open source tools, CMIS, and SFF standards (SFP, QSFP)., • Good communication skills and knowledge of software quality processes. At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $210,600.00 to $305,100.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $210,600.00 - $350,800.00 Non-Metro New York state & Washington state: $189,300.00 - $312,200.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

The application window is expected to close on: 06/06/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team We are a dynamic and driven team dedicated to deliveringcutting-edgesolutions that empowerhyperscalersto deploy massive networks fueling AI clusters, general-purpose computing, Data Center Interconnect (DCI), and Edge. Our mission is to provide seamless integration of silicon, hardware, and software, ensuringhyperscalersare successful and deliver outstanding business outcomes for Cisco. Every day, we collaborate with customers to define impactful requirements, drive engineering efforts from concept to execution, and handle escalations. Join us in shaping the future of networking at a scale that transforms industries! Your Impact As a Sr. Director, Product Management, you will lead the definition, strategy, and shaping of the portfolio and solutions tailored for large-scale web customers. You will collaborate closely with customers, sales, engineering, and marketing teams to design products that enable business transformation. At Cisco, product and architecture leaders are empowered and trusted tobe the voice of the customer. In this role, you willestablishstrategic roadmaps, drive priorities to meetobjectives, and explore new horizons in technology. You will also serve as a technical advisor to leadership and influence industry standards. Key Responsibilities • Portfolio Strategy: Evaluate the N+1/N+2 generation of Silicon, Optics, and Interconnects technologies (currently 1.6T/3.2T) for Cisco investment., • Roadmap Architecture: Shape the systems roadmap (including fixed, modular, and disaggregated scale-out) as well as the scale-up systems roadmap., • Technical Oversight: Review and approve all RFx responses (RFI, RFP, RFQ) to ensure customer commitments, architectural claims, performance numbers, and margin assumptions are aligned., • Modern Tooling: Drive simulations for functional and performance analysis using modern industry tooling., • Ecosystem Engagement:, • Engage withHyperscalercustomers on technology, roadmap positioning, and value propositions., • Partner with technology providers for assessments and project collaboration., • Participate in industry events to drive product messaging and strategy., • Internal Alignment: Align with internal stakeholders across Silicon, HW, Optics, and software teams to ensure business success., • Leadership & Mentorship: Mentor and coach the product management, technical marketing, and engineering communities to strengthen technicalexpertise., • WebscaleExpertise:Previousexperience working with or forWebscalecompanies in product management, engineering, or validation., • Technical Breadth: Knowledge of building blocks such as high-speed optics, coherentpluggables, silicon-design principles, liquid cooling, high-speed SerDes, and system design., • Architectural Fluency: A solid background in network system design and the trade-offs involved in defining new products., • High-Stakes Performance: Ability to lead and perform under pressure in front of customers and internal R&D teams., • Influence: A strongtrack recordof growing and influencing others across all levels of senior leadership. Minimum Qualifications: • Education:Bachelor's degree in electrical engineering, Computer Science, or equivalent work experience (preferably in networking hardware)., • Experience: 10+ years in engineering, solutions architecture, or product management (preferably in networking silicon)., • Domain Knowledge: Demonstrable experience in Service Provider Networking, Data Center Networking, or directly withHyperscalers. Preferred Qualifications • Advanced Degree: Master's degree or PhD is preferred., • Full-Stack Fluency: Experience with the combination of ASIC, Hardware (Systems and Optics), and the software stack., • Matrix Leadership: Prior experience leading cross-functional teams as a product or engineering leader within a fast-paced matrix organization., • Customer Insight: Deep understanding of networking customer requirements and usage models At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $280,100.00 to $384,800.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $280,100.00 - $442,600.00 Non-Metro New York state & Washington state: $267,600.00 - $390,300.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

PsiQuantum'smission is to build the first useful quantum computers-machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. Our architecture and approachisbased on silicon photonics. Byleveragingthe advanced semiconductor manufacturing industry-including partners like GlobalFoundries-we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photonsdon'tfeel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. In 2024,PsiQuantumannounced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining-and that now is the time to scale. PsiQuantumalso develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. Quantum computing is not an extension of classical computing. Itrepresentsa fundamental shift-and a path to mastering challenges that cannot besolvedany other way. The potential is enormous, and we have a clearpathto make it real. Come join us. Job Summary: The mission of PsiQuantum's Senior Director of Electrical Subsystem Design is todrive the Electronics team's hardware designs which are integral to theunderlying system of the quantum computer. This Director will collaborate incross-functional teams of thermal, mechanical, firmware, and optical engineers.The designs will meet the requirements of the overall system architecture andphysical framework of the quantum computer. Responsibilities: • Design and Architecture Strategy:, • Developing and implementing multi-blade electrical subsystemdesign strategies, architectures, processes and best practices thatencompass not only hardware but also the attendant low-levelcontrol software stack., • Map out a scalable and extensible hardware implementationarchitecture that conforms to the system architectural definition., • Problem Solving: Active participation in troubleshooting and resolvingdesign-related issues., • Project Management: Managing electrical subsystem design projects,ensuring timely delivery and adherence to budgets., • Collaboration: Collaborating with cross-functional teams, includingsystem design and validation., • Technical Expertise: Maintaining in-depth technical knowledge ofelectrical subsystem design principles, software, and industry standards., • Team Leadership: Leading, mentoring, hiring and developing a team ofelectrical subsystem designers., • Quality Assurance: Ensuring the quality, reliability, and manufacturabilityof electrical subsystem designs., • Design Reviews: Conducting design reviews, providing feedback, andresolving design issues., • Communication: Communicating design requirements and progress tostakeholders. Experience/Qualifications: • Master's Degree or above in Electrical Engineering, Physics or equivalent., • 15 years of relevant experience in electrical subsystem design, includingteam leadership and project management. Key Skills and Qualifications: • Technical Expertise: Strong understanding of PCB design principles,including layout, routing, component placement, and stack-up. Strongunderstanding of multi-PCB systems., • Problem-Solving Skills: Strong ability to identify and resolve complextechnical problems, including problems associated with signal integrity,EMI, power integrity, etc., • Software Proficiency: Proficiency in Allegro PCB design software., • Leadership Skills: Proven ability to lead and manage teams, motivateemployees, and foster a collaborative environment., • Communication Skills: Excellent written and verbal communication skills,including the ability to effectively communicate technical information. PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws. Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to _. We are not accepting unsolicited resumes from employment agencies. The ranges below reflect the target ranges for a new hire base salary. One is for the Bay Area (within 50 miles of HQ, Palo Alto), the second one (if applicable) is for elsewhere in the US (beyond 50 miles of HQ, Palo Alto). If there is only one range, it is for the specific location of where the position will be located.Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future. U.S. Base Pay Range $255,000—$275,000 USDBay Area Pay Range $265,000—$290,000 USD

Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World's Most Experienced Driver-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo's fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. The Driver Understanding and Evaluation (DUE) team at Waymo is developing rich metrics for understanding the behavior of the Waymo Driver in the real world, and technologies such as context and scene analysis to understand driving, understanding and augmenting real world driving data to generate rare driving events, build large scale data infrastructure, improve components such as agents and a realistic simulator. These technologies come together to drive the overall technical strategy and methodology used to evaluate the behavior of the Waymo Driver. The DUE Machine Learning team will build and operate scalable machine learning and data systems, simulation workflow and insight tools, improve and speed up the evaluation and onboard developer journeys. It will combine expert human judgements and advanced machine learning models to deliver training and evaluation data for hundreds of metrics and components that make up the Waymo driver. We are looking for researchers and software engineers who are passionate about developing machine learning techniques for the Evaluation systems on our autonomous vehicles, and have an incessant drive to improve the performance of our technology stack. You will: • Lead the development of cutting edge Deep Learning and machine learning models to enhance human-led triaging and introduce automation for high-volume workflows, • Design and build Gen AI LLM/VLM solutions for self driving car behavior analysis and anomaly detection, • Proactively monitor and assimilate best practices from within Alphabet and the broader industry to develop a Reinforcement Learning from human preference-based data collection and evaluation system., • Enhance User Feedback Analysis, collaborate seamlessly with product and business teams to design and implement tools for multi-label classifications, sentiment assessment, comment summarization, root cause analysis and trend analysis of rider feedback, • Oversee the production and optimization of machine learning models aiming to assess Waymo's expansive fleet of vehicles that cumulatively travel millions of miles., • Drive technical direction, and provide technical inputs and guidance to the team., • Work closely with PMs and TPMs to help define product requirements and align the technical agenda with the company's business objectives., • Collaborate closely with multiple teams (e.g., Prediction, Planning, Research), other technical leads, and senior leaderships across Waymo to deliver on key strategic efforts. You have: • B.S. in Computer Science, Robotics, Machine Learning, similar technical field of study, or equivalent practical experience, • 7+ years of experience with hands-on experience in machine learning projects, • Strong coding experience in C++ and/or Python., • Experience in at least one of: Foundational Models, VLM, Deep Learning, • Experience with ML frameworks such as TensorFlow, PyTorch, Hugging Face's transformers, along with expertise in deep learning models and ML deployment at scale We prefer: • M.S. or Ph.D. degree Computer Science or related quantitative field with a specialization of machine learning., • 10+ years of experience with hands-on experience in machine learning projects, • Deep learning experience with Transformers, • Gen AI LLM/VLM experience, • Experience with building tools for applied machine learning, including MLOps, evaluation/validation techniques, and model performance optimization., • Large-scale data processing and analytical skills. The expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process. Waymo employees are also eligible to participate in Waymo's discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range$238,000—$302,000 USD

The application window is expected to close on: 04/30/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This is an onsite role and will require working out of the Milpitas/San Jose office location. Meet The Team: The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being developed in the industry. You will work with Cisco's best-in-class switching solution team. Our team is responsible for driving integration of the Nexus systems and ACI with software, including OpenStack, Docker, and Open vSwitch, to help our customers build multi-tenant clouds. Your Impact: Develop innovative emulation environments that will be used to evaluate the performance and functionality of multi-terabit systems. Developing emulation infrastructure using C/C++ and TCL As a team member, work closely with the design, DV, power, and post-silicon diagnostic teams. Assist with test plan design, test implementation, and debugging during the pre-silicon emulation process. Develop tests to generate complex traffic, and performance scenarios to catch potential post-Silicon issues during the Pre-Silicon phase. Work with leading emulation vendors to solve issues. Minimum Qualifications: Bachelor's or Master's degree in EE (Electrical & Electronics) or CE (Computer Engineering) with 8+ years of relevant experience. Prior emulation experience on platforms such as Palladium, Veloce, or Zebu as well as experience with compilation, debug, performance testing. Prior experience with RTL development for Emulation prototypes. Prior experience with C/C++ and TCL infrastructure development. Prior experience with System debug tools like gdb, waveform debuggers. Preferred Qualifications: Experience with scripting programs (e.g., Python, Perl or similar) Prior experience with UVM and System Verilog. Post Silicon functional validation or debugging experience is a plus. Experience with protocols e.g. PCie, I2C, Ethernet packet headers, Ethernet protocol is preferred. At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $183,800.00 to $263,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $183,800.00 - $303,100.00 Non-Metro New York state & Washington state: $163,600.00 - $269,800.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

The application window is expected to close on: 06/30/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team Cisco Silicon One is redefining networking silicon and setting new industry standards for decades to come. We are seeking a seasoned New Product Program Manager to join our dynamic team, build and manage ASIC Program schedules, and ensure best-in-class operational excellence across the full ASIC product lifecycle-from prototype through production sustainment. As a New Product Program Manager (NPPM), you will be responsible for driving the successful introduction and ramp-up of new silicon products from concept through production. You will partner multi-functionally with Engineering, Manufacturing, Test, Quality, and Supply Chain teams to ensure on-time delivery, quality, and cost objectives are met. This role requires strong program management skills, technical competence, and the ability to influence and coordinate across multiple organizations. Your Impact Program Leadership: Lead multi-functional teams through the full silicon product lifecycle-from definition, prototyping, and validation through volume production. Schedule Management: Develop, maintain, and communicate detailed program schedules, achievements, and deliverables. Risk Management: Identify and proactively manage program risks, ensuring timely mitigation plans are in place. Partner Communication: Serve as the primary point of contact for program status, updates, and critical issues to senior management and interested parties. Lifecycle Ownership: Own all aspects of product lifecycle management-scope definition, BOM/POR, schedules, interlocks, communication, and sustaining handoffs. Multi-functional Collaboration: Work closely with Engineering, Test, Quality, Manufacturing, Supply Chain, and Marketing to ensure alignment and resolve issues. Cost and Quality Targets: Ensure products meet established cost, quality, and reliability targets at each development stage. Operational Rigor: Monitor alignment to Plan of Record (POR), manage changes, and ensure alignment with schedule, quality, and cost targets. Documentation and Reporting: Prepare and present program status reports, post-mortems, and lessons learned to leadership. Program Improvement: Drive continuous improvement initiatives in program execution, using standard methodologies and lessons learned. Required Qualifications 8+ years of program management experience in semiconductor, silicon, ASIC, or high-tech product development. Demonstrated success in launching at least ten new silicon products within fast-paced, settings 10+ years of experience with new product introduction (NPI) processes and product lifecycle management for silicon ASICs including process, product and package qualifications as well as Test HW process and bring-up. Knowledge of silicon development flows: architecture, design, verification, product/test engineering, and silicon lifecycle management. Experience translating customer requirements into actionable engineering achievements. Familiarity with hardware/system design, testing, and production engineering. Preferred Qualifications Bachelor's degree in Engineering, Computer Science, or related technical field; Master's degree highly preferred. Excellent organizational, analytical, and problem-solving skills. Outstanding verbal and written communication skills. Ability to lead and influence multi-functional teams without direct authority. PMP, Agile, or similar project management certification. Experience with silicon product development, ASIC/SoC, or hardware manufacturing. Familiarity with supply chain operations, quality/reliability testing, and manufacturing process flows. Black Belt in Six Sigma or equivalent process innovation/management. Experience using program management tools (e.g., MS Project, Smartsheet, Jira). At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $159,800.00 to $202,300.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $159,800.00 - $232,600.00 Non-Metro New York state & Washington state: $141,700.00 - $206,400.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

The application window is expected to close on: 07/31/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This position requires that you commute to the San Jose, CA office 5 days a week. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches through web-scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being developed in the industry. Your Impact In this role, you will be developing cutting-edge next-generation high-speed interconnect for deployment in data centers around the world. You will lead the activities of supporting internal and external customers with all requests related to Silicon One high-speed interfaces, including the development of new features and bug fixes. Other responsibilities include: Develop and execute electrical characterization testing for high-speed interconnect devices Support characterization, validation, compliance, and system integration of Silicon One devices Work with ASIC, system, and signal integrity team to evaluate design tradeoffs, optimize design solutions, and review SI/PI designs Develop automation and analysis tools for lab measurements and data processing in Python and/or Matlab Drive methodology development, including best practices for Cisco's high-speed solutions and platforms to handle different system cases You will work with the Design, Signal Integrity, Routing SW/HW, SDK, and Production and Assembly teams. Minimum Qualifications MSEE or Computer Engineering degree with 5+ years of lab and related experience, or BSEE or Computer Engineering degree with 7+ years of lab and related experience. 2+ years' hands-on experience with high-speed interface systems and high-speed lab measurements: usage of RF components (RF cable, bias tee, DC block) and test equipment (sampling scope, real-time scope, PPG, BERT, VNA, electrical spectrum analyzer) Experience with high-speed interfaces and analog building blocks PLL, CDR, CTLE, DFE, FFE, and FEC Programming knowledge in Python and C/C++ Strong debugging skills Preferred Qualifications At least basic understanding of high-speed optical testing Strong documentation, problem-solving, and technical communication skills Experience working cross-functionally and collaborating with various technical teams MS in Electrical Engineering or Computer Engineering with 4 years lab experience Knowledge of IEEE 802.3 and OIF specifications Experience with Signal integrity, DSP, and communication systems You are a problem solver who loves to tackle new challenges and a self-starter who is highly motivated and thrives on innovative technology. You are a strong communicator in a team setting, enjoy working in a dynamic team environment, and are an out-of-the-box thinker. At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $152,400.00 to $221,800.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $152,400.00 - $255,100.00 Non-Metro New York state & Washington state: $134,300.00 - $224,800.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World's Most Experienced Driver-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo's fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. Hardware Engineering is a diverse, innovative, and collaborative group of electrical, mechanical, reliability, software and vehicle engineers. We design, build, and perfect the products which are the eyes and ears of Waymo's autonomous driving technology, and integrate those products into vehicle platforms. We're seeking curious and talented teammates to keep us moving in the right direction. This role follows a hybrid work schedule and you will report to a Systems Engineering Manager You will: • Develop and own comprehensive vehicle system security requirements aligned with the high-level vehicle platform security strategy, • Work with OEMs and adjacent Systems Engineers to define and implement the vehicle network and module security architecture, • Define and manage requirements for vehicle platform features that are based on security concepts, such as Digital Key and SOTA, • Create detailed security requirements for Waymo software interfaces to ensure secure communication with the vehicle platform, • Develop Verification and Validation (V&V) plans, execute tests, analyze results, and resolve defects related to platform security across various platforms and prototype phases, • Oversee the delivery timing of feature sets and software updates to the vehicle prototype fleet, and troubleshoot issues to ensure required capabilities You have: • Bachelor's degree in Computer Science, Cybersecurity, Electrical Engineering, Communications Engineering, or similar, • A thorough understanding of vehicle communications and module security technology (Autosar SecOC, Security relevant services in ISO14229-1 UDS, HSMs, etc), • A deep knowledge of vehicle communication networks and protocols (Physical and Application layer, e.g. CAN, FlexRay, LIN, Ethernet, DBCs, etc) and an understanding of the embedded systems that control via these networks, • The ability to create & negotiate targets and requirements with OEMs and Waymo adjacencies and create and execute effective DVPs as part of the role We prefer: • Hands-on experience implementing and testing automotive security mechanisms, • Full lifecycle experience launching an automotive security critical system from definition to market, • At least 5 years experience in an automotive security (or similar industry) role delivering software and/or hardware, • Experience with CCC Digital Key implementation Travel requirements: • 6-8 times / year - international, typically 1 week at a time The expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process. Waymo employees are also eligible to participate in Waymo's discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range$198,000—$248,000 USD

The application window is expected to close on: 08/07/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. You will be in the Silicon One development organization as an ASIC Technical Lead in San Jose with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. • Responsible for defining and implementing post-silicon strategies, • Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs., • Responsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL., • Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows., • Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug strategies., • The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship., • Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 10 years of experience., • Prior experience in post-silicon debug experience from first silicon to production, • Prior experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan., • Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime, • Prior experience working with Gate level simulation, debugging with VCS and other simulators., • Verilog design experience - developing custom DFT logic & IP integration; familiarity with functional verification, • DFT CAD development - Test Architecture, Methodology and Infrastructure, • Test Static Timing Analysis, • Post silicon validation using DFT patterns., • Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $210,600.00 to $305,100.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $210,600.00 - $350,800.00 Non-Metro New York state & Washington state: $189,300.00 - $312,200.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

PsiQuantum'smission is to build the first useful quantum computers-machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. Our architecture and approachisbased on silicon photonics. Byleveragingthe advanced semiconductor manufacturing industry-including partners like GlobalFoundries-we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photonsdon'tfeel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. In 2024,PsiQuantumannounced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining-and that now is the time to scale. PsiQuantumalso develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. Quantum computing is not an extension of classical computing. Itrepresentsa fundamental shift-and a path to mastering challenges that cannot besolvedany other way. The potential is enormous, and we have a clearpathto make it real. Come join us. Job Summary: Our system architecture team sits at the interface of hardware development, manufacturing, and the quantum architecture to design the first fault-tolerant quantum computer. We are looking for a hands-on technical manager to lead the validation and closure of quantum architectural models against hardware system data - a vital activity in our progress towards this goal. Responsibilities: • Lead and actively contribute to projects related to the development of quantum optical system models and their closure against real quantum computing system data., • Manage and grow a team of architects providing real-time analysis and feedback to engineering teams regarding quantum hardware behavior., • Co-ordinate closely with photonics, electronics, systems and architecture teams to ensure consistent, data-driven descriptions of system architecture and performance are available. Experience/Qualifications: • PhD in quantum physics discipline, quantum optics and photonics preferred., • 5+ years of relevant academic or industry research experience in quantum computing or quantum information., • Knowledge of linear optical quantum computing and its associated error models required., • Experience performing or working in close collaboration with quantum optics experiments required., • Ability to work across domains and collaborate effectively with multi-disciplinary technical teams across sites & timezones., • Experience programming in Python and competent use of collaborative software development tools (e.g., GitHub) is desirable. PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws. Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to _. We are not accepting unsolicited resumes from employment agencies. The ranges below reflect the target ranges for a new hire base salary. One is for the Bay Area (within 50 miles of HQ, Palo Alto), the second one (if applicable) is for elsewhere in the US (beyond 50 miles of HQ, Palo Alto). If there is only one range, it is for the specific location of where the position will be located.Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future. U.S. Base Pay Range $190,000—$210,000 USDBay Area Pay Range $210,000—$240,000 USD

Quantum computing holds the promise of humanity's mastery over the natural world, but only if we can build a real quantum computer. PsiQuantum is on a mission to build the first real, useful quantum computers, capable of delivering the world-changing applications that the technology has long promised. We know that means we will need to build a system with roughly 1 million qubits that supports fault tolerant error correction within a scalable architecture, and a data center footprint. By harnessing the laws of quantum physics, quantum computers can provide exponential performance increases over today's most powerful supercomputers, offering the potential for extraordinary advances across a broad range of industries including climate, energy, healthcare, pharmaceuticals, finance, agriculture, transportation, materials design, and many more. PsiQuantum has determined the fastest path to delivering a useful quantum computer, years earlier than the rest of the industry. Our architecture is based on silicon photonics which gives us the ability to produce our components at Tier-1 semiconductor fabs such as GlobalFoundries where we leverage high-volume semiconductor manufacturing processes, the same processes that are already producing billions of chips for telecom and consumer electronics applications. We also benefit from the quantum mechanics reality that photons don't feel heat or electromagnetic interference, allowing us to take advantage of existing cryogenic cooling systems and industry standard fiber connectivity. In 2024, PsiQuantum announced two government-funded projects to support the build-out of our first Quantum Data Centers and utility-scale quantum computers in Brisbane, Australia and Chicago, Illinois. Both projects are backed by nations that understand quantum computing's potential impact and the need to scale this technology to unlock that potential. And we won't just be building the hardware, but also the fault tolerant quantum applications that will provide industry-transforming results. Quantum computing is not just an evolution of the decades-old advancement in compute power. It provides the key to mastering our future, not merely discovering it. The potential is enormous, and we have the plan to make it real. Come join us.There's much more work to be done and we are looking for exceptional talent to join us on this extraordinary journey! Job Summary: The Principal Electro-Optics Systems Engineer is a technical lead role in which he/she drives and own design and execution of fiber optic systems. This role is responsible for leading from early development to productization of optical network and communications, including design, validation and woking with vendors to deliver full optical development for large quantum systems. Responsibilities: • Technical Lead of full optical design and distribution network for large systems & multiple systems., • Own, define & develop design requirements and document requirements for system level behaviors., • Work effectively with cross functional team: quantum architect, electronics, mechanical and thermal teams and assess how to negotiate for tradeoffs and meet requirements., • Work with vendors and evaluate advanced fiber optic components, and qualify such components for use in quantum computing applications., • Assess how to push technical boundaries to meet tight optical specs (optical loss and thermal stability)., • Lead & execute designs, development , debug for optical communication for racks., • Lead build and test prototypes, maintain a BOM., • Lead validation tests plans & deliver proof of concept to productization, working closely with the system build and validation team., • Deliver electro-optical network for full quantum systems in a fast paced environment., • Some Python scripting, calling Controls SW APIs / drivers to control lab equipment and proprietary systems., • Write and maintain documentation of system performance., • Clear communication and technical lead engineer teams Experience/Qualifications: • M.S. or PhD in Physics, Optical or Electrical Engineering with 10+ years industry experience., • >5+ years experience designing, validating and testing fiber networks and fiber optical systems., • Expertise in cross-functional product development., • Systems experience working with complex products., • Experience designing fiber optic systems, working with photonic integrated circuits (PICs), fiber networking., • Experience working with optical test equipment including power meters, optical backscatter reflectometers (OBR), optical spectrum analyzer (OSA)., • Experience working with instrumentation used in the photonics and/or the electronics industry., • Experience with software controls in Python., • Experience developing test methods and optimization, tuning algorithms., • Experience in product lifecycles, transitioning from R&D to product development., • Strong organizational skills, excellent communication skills, attention to detail and ability to multitask., • Strong critical thinking, creative, innovative, analytical, and detail oriented problem-solving skill., • Ability to lead and work in a fast paced environment & collaborate with cross functional team. Preferred Skills & Experience: • Industry experience with electro-optics systems., • Industry experience with optical systems in vacuum., • Managed and lead on how to do large optical routing and management., • Understanding of photonics & non-linear optics, thermal stability. PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws. Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to _. We are not accepting unsolicited resumes from employment agencies. The ranges below reflect the target ranges for a new hire base salary. One is for the Bay Area (within 50 miles of HQ, Palo Alto), the second one (if applicable) is for elsewhere in the US (beyond 50 miles of HQ, Palo Alto). If there is only one range, it is for the specific location of where the position will be located.Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future. U.S. Base Pay Range $230,000—$260,000 USDBay Area Pay Range $230,000—$260,000 USD

The application window is expected to close on: Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms-like Silicon One-are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development-from design to qualification to production-is within our team, we're able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. Your Impact • Own design and validation of a complex hardware system, • Develop technology roadmap and drive innovation, • Participate as a valuable team member to deliver quality products on time., • Participate in cross-functional meetings and teams., • Participate in creating functional specifications and technical requirement documentation. Minimum Qualifications • Bachelor's degree in Electrical Engineering or Computer Engineering and 5+ years of experience, or Masters in Electrical Engineering or Computer Engineering + 3 years of related experience, or PhD in Electrical Engineering or Computer Engineering + 0 years of related experience in system level development, preferably in the Server/Compute or Networking industry., • Experience in hardware designs and validation. Preferred Qualifications • Hands on board design knowledge, including design tools such as Cadence Concept and Allegro., • Experience with multiple SoC and CPU architectures., • Experience in FPGA development and verification processes., • Knowledge and deep understanding of high-speed interfaces, • Experience in hardware validation using lab equipment such as Oscilloscopes, Logic Analyzers, and Spectrum Analyzers., • Experience with shipping complex networking products., • Experience collaborating with cross-functional teams and partners. At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $135,800.00 to $193,400.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $135,800.00 - $222,400.00 Non-Metro New York state & Washington state: $122,000.00 - $197,900.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

With electric vehicles expected to be nearly 30% of new vehicle sales by 2025 and more than 50% by 2040, electric mobility is becoming a reality. ChargePoint (NYSE: CHPT) is at the center of this revolution, powering one of the world's leading EV charging networks and a comprehensive set of hardware, software and mobile solutions for every charging need across North America and Europe. We bring together drivers, businesses, automakers, policymakers, utilities and other stakeholders to make e-mobility a global reality. Since our founding in 2007, ChargePoint has focused solely on making the transition to electric easy for businesses, fleets and drivers. ChargePoint offers a once-in-a-lifetime opportunity to create an all-electric future and a trillion-dollar market. At ChargePoint, we foster a positive and productive work environment by committing to live our values of Be Courageous, Charge Together, Love our Customers, Operate with Openness, and Relentlessly Pursue Awesome. These values guide how we show up every day, align, and work together to build a brighter future for all of us. Join the team that is building the EV charging industry and make your mark on how people and goods will get everywhere they need to go, in any context, for generations to come. Senior Manager, Power Electronics ChargePoint is looking for a creative and versatile Staff Power Electronics Engineer to help ensure that our products meet high design, development, and production quality. The role will play a key cross-functional role to drive many aspects, including the development and production of high-quality power systems. • Architect and design high-power AC and DC systems for consumer and commercial EV chargers, • Collaborate with engineers in the development of high-power AC to DC and DC to DC converters, • Design and develop advanced soft switching 40-100 kW, up to 2000 VDC multi-level converters, • Design and develop a multi-level 100-200 kW, up to 2000 VDC four-quadrant grid tie inverter complying with grid interactive regulations in EU and NA, • Responsible for all aspects of product design, including modelling, key component selection, schematic capture, PCB layout, code development, magnetics design, thermal design, regulatory and compliance considerations, and DFM, • Utilize power topologies such at LLC, phase shifted full bridge, flyback, forward, multi-level converters, including PFC (single phase and three phase), and associated techniques such as ZVS/ZCS, • Model power designs using analysis tools such as PLECS, MATLAB, and Spice. Create designs based on both off-the-shelf integrated circuit controllers, FPGAs / PLDs, and DSP digital control using embedded software development experience, • Work effectively with cross-functional teams to resolve early (architectural) and late (lab, test & validation) Ensure high reliability of the product under stress conditions and environments for extended periods • M.S. required (PhD desired) in Engineering (electrical, computer, or electronics), • 10+ years of experience in bringing power electronics products to market, • Strong electrical/electronic design skills and understanding of system-level engineering tradeoffs, • Experience designing AC/DC DC/DC power conversion systems, • Able to drive solutions across software, mechanical, power, and thermal boundaries to assure great results, • Experience working with x-functional teams: mechanical, software, and test, • Current knowledge of industry standards for consumer and industrial products, • Knowledge of EV charging standards a plus, • Some travel is expected. Campbell, CA ChargePoint is committed to fair and equitable compensation practices. The targeted US salary range for roles at this operating level is $170,000 to $200,000. This range represents base salary and does not reflect equity, benefits, or variable pay where applicable. Actual base salaries are based on several factors unique to each candidate, including but not limited to skill set, experience, certifications, and specific work location We are committed to an inclusive and diverse team. ChargePoint is an equal opportunity employer. We do not discriminate based on race, color, ethnicity, ancestry, national origin, religion, sex, gender, gender identity, gender expression, sexual orientation, age, disability, veteran status, genetic information, marital status or any legally protected status. If there is a match between your experiences/skills and the Company needs, we will contact you directly. ChargePoint is committed to fostering an inclusive workplace that welcomes and supports all qualified individuals. In alignment with this commitment, we ensure that persons with disabilities are provided with reasonable accommodations throughout the employment process. If you need a reasonable accommodation to participate in the application or interview process, to perform essential job functions, or to access any other benefits and privileges of employment, please contact us at accommodations@chargepoint.com. ChargePoint is an equal opportunity employer. Applicants only - Recruiting agencies do not contact.

PsiQuantum'smission is to build the first useful quantum computers-machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. Our architecture and approachisbased on silicon photonics. Byleveragingthe advanced semiconductor manufacturing industry-including partners like GlobalFoundries-we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photonsdon'tfeel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. In 2024,PsiQuantumannounced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining-and that now is the time to scale. PsiQuantumalso develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. Quantum computing is not an extension of classical computing. Itrepresentsa fundamental shift-and a path to mastering challenges that cannot besolvedany other way. The potential is enormous, and we have a clearpathto make it real. Come join us. Job Summary: At PsiQuantum, we are developing and testing prototype modules that will scale into a datacenter-sized, fault-tolerant quantum computer. These modules and subsystems require regular calibration to ensure reliable generation of single photons and entangled states that underpin our quantum computing architecture. This role focuses on developing system-level calibration strategies for electro-optic components and subsystems, working across hardware, firmware, and software boundaries to ensure performance, reliability, and scalability. Role Overview Own and drive the end-to-end calibration strategy for electro-optic subsystems, from early concept through system integration and deployment, with a focus on uptime, scalability, and operational efficiency. Why is this role unique? This role has direct influence on how calibration is architected as a scalable system function. It shapes how electro-optic subsystems behave in production environments where uptime, automation, and repeatability are critical. In addition, it requires working across numerous engineering teams. What success looks like? Success in this role means: • Identifying and de-risking critical calibration dependencies early in development, • Reducing calibration time and minimizing impact on system uptime, • Delivering robust, automated calibration routines that integrate cleanly into the system software stack Over time, this work establishes scalable calibration frameworks that support high-availability quantum computing systems. Responsibilities: System Calibration Strategy • Consolidate and structure all calibration and operational information for our components and sub-assemblies involving electro-optic devices, • Lead system-level calibration risk analysis and mitigation planning across hardware, firmware, and software interfaces, • Develop requirements for hardware, firmware, and software teams to meet uptime and performance targets, • Own and optimize calibration strategy against uptime requirements Modeling & Analysis • Develop modeling and analytical tools to understand how component-level electro-optic calibrations behave and interact when integrated into the full system, • Track calibration time estimates and actuals to model our system's uptime and identify areas requiring optimization Integration & Execution • Conduct prototyping of calibrations on benchtop setups, • Specify test requirements to validate and de-risk calibrations at various levels of integration testing, • Write control software to implement calibration procedures in our software stack Cross-Functional Leadership • Lead ad-hoc cross-functional working groups to collaboratively develop and refine high-risk calibrations, • Partner with other system calibration engineers and software engineering teams to integrate calibrations into executable routines, • Lead system-level validation support by providing system-level context, debugging support, and root-cause analysis during prototyping and integration Experience/Qualifications: • M.S. with 5+ years of industry experience or Ph.D. with 3+ years of industry experience in Electrical Engineering, Optical Engineering, Physics, or a related discipline, • Experience developing and integrating complex systems spanning optical and electronic hardware, firmware, software, and data acquisition, including cross-functional collaboration, • Hands-on experience designing, characterizing, or calibrating electro-optic devices and systems, • Experience developing and integrating complex systems across optical/electronic hardware, firmware, and software, including cross-functional collaboration, • Proven ability to translate complex technical concepts into clear requirements, models, or system frameworks Preferred Qualifications • Experience with integrated photonics, RF systems, or high-speed optical switching, • Experience developing or scaling calibration procedures in complex experimental or production systems where scale and high reliability matter, • Experience with system-level modeling, uptime analysis, or performance optimization, • Track record of leading cross-functional technical efforts or driving alignment across teams, • Experience documenting system architectures, experimental processes, or hardware designs in a structured and scalable way, • Demonstrated interest in quantum computing or related advanced technologies Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to _. We are not accepting unsolicited resumes from employment agencies. The ranges below reflect the target ranges for a new hire base salary. One is for the Bay Area (within 50 miles of HQ, Palo Alto), the second one (if applicable) is for elsewhere in the US (beyond 50 miles of HQ, Palo Alto). If there is only one range, it is for the specific location of where the position will be located.Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future. U.S. Base Pay Range $148,000—$163,000 USDBay Area Pay Range $180,000—$195,000 USD

With electric vehicles expected to be nearly 30% of new vehicle sales by 2025 and more than 50% by 2040, electric mobility is becoming a reality. ChargePoint (NYSE: CHPT) is at the center of this revolution, powering one of the world's leading EV charging networks and a comprehensive set of hardware, software and mobile solutions for every charging need across North America and Europe. We bring together drivers, businesses, automakers, policymakers, utilities and other stakeholders to make e-mobility a global reality. Since our founding in 2007, ChargePoint has focused solely on making the transition to electric easy for businesses, fleets and drivers. ChargePoint offers a once-in-a-lifetime opportunity to create an all-electric future and a trillion-dollar market. At ChargePoint, we foster a positive and productive work environment by committing to live our values of Be Courageous, Charge Together, Love our Customers, Operate with Openness, and Relentlessly Pursue Awesome. These values guide how we show up every day, align, and work together to build a brighter future for all of us. Join the team that is building the EV charging industry and make your mark on how people and goods will get everywhere they need to go, in any context, for generations to come. Senior Manager, Power Electronics Firmware ChargePoint is seeking a seasoned Power Electronics Controls and Firmware Engineer with over 5 years of experience in embedded power control firmware development. The ideal candidate should have expertise in Control Engineering and Power Electronics, specifically for next-generation fast-charging products. • Developing and implementing embedded controls for PFC, Chargers, DC/DC, and inverters, etc., • Board bring-up experience, device driver development for CAN, I2C, SPI, etc., • Participating in developing specifications, design reviews, and executing unit tests, • Proves design concepts through a combination of computer simulation and physical laboratory implementation/testing, • Develops automated test cases for Hardware-In-Loop modelling/Testing (preferable), • Remains abreast of the latest technology in Digital control/Controllers, • Writing lean code for real-time interrupt-driven applications, • Proficient inunderstanding the schematics and debugging hardware issues, • Understanding Safety regulatory requirements in power converters for use with fast chargers, • 5+ years of proven experience developing Power Electronics products, • 5+ years of programming experience in C/C++, Assembly for 32-bit controllers, DSP's and Python for scripting and automation, • Experience Implementing Control code for Power Converters (without using a code generation tool), • Firmware Development: Solid working experience in developing embedded firmware using programming languages such as C/C++ for real-time systems, • Power Electronics Knowledge: Strong understanding of power electronics principles, including control techniques for inverters, rectifiers, and dc-dc converters [LLC, CLLC, DAB, etc.], • Experience working with Grid-tie inverter systems (Solar, BESS, EVSE, etc.), • Hands-on high-power lab working experience, and able to debug hardware issues related to firmware functions in the power converter, • Microcontroller and Peripherals: Proficiency in programming microcontrollers, utilising various peripherals such as timers, PWM, interrupts, GPIOs, ADC, UART, I2C, SPI, CAN, and Ethernet, • Experience with version control systems, such as Git, SVN, etc., • Bootloader Development: Expertise in developing secure and reliable bootloaders, including memory management, firmware partitioning, communication interfaces, flash memory programming, and verification/validation processes, • HIL Experience: Experience in HIL testing, including testbed setup, real-time simulation, plant modelling, hardware interfaces, test scripting, fault injection, and test result analysis, • Firmware Debugging: Proven skills in debugging complex firmware issues using tools such as oscilloscopes, logic analysers, and debuggers, • Real-Time Operating Systems (RTOS) Experience: Experience in working with real-time operating systems, • Knowledge of communication protocols commonly used in power electronics systems, • Knowledge and Skills (PFC, Chargers, DC/DC, inverters, etc.), • Experience in developing control systems for Power inverters/Converters, • Knowledge in control system design/modelling/simulation in Plecs, MATLAB, Simulink or other similar tools, • Experience in FPGA programming and Simulation techniques is preferable ChargePoint is committed to fair and equitable compensation practices. The targeted US salary range for roles at this operating level is $170,000 to $210,000. This range represents base salary and does not reflect equity, benefits, or variable pay where applicable. Actual base salaries are based on several factors unique to each candidate, including but not limited to skill set, experience, certifications, and specific work location. #LI-JH1 We are committed to an inclusive and diverse team. ChargePoint is an equal opportunity employer. We do not discriminate based on race, color, ethnicity, ancestry, national origin, religion, sex, gender, gender identity, gender expression, sexual orientation, age, disability, veteran status, genetic information, marital status or any legally protected status. If there is a match between your experiences/skills and the Company needs, we will contact you directly. ChargePoint is committed to fostering an inclusive workplace that welcomes and supports all qualified individuals. In alignment with this commitment, we ensure that persons with disabilities are provided with reasonable accommodations throughout the employment process. If you need a reasonable accommodation to participate in the application or interview process, to perform essential job functions, or to access any other benefits and privileges of employment, please contact us at accommodations@chargepoint.com. ChargePoint is an equal opportunity employer. Applicants only - Recruiting agencies do not contact.

With electric vehicles expected to be nearly 30% of new vehicle sales by 2025 and more than 50% by 2040, electric mobility is becoming a reality. ChargePoint (NYSE: CHPT) is at the center of this revolution, powering one of the world's leading EV charging networks and a comprehensive set of hardware, software and mobile solutions for every charging need across North America and Europe. We bring together drivers, businesses, automakers, policymakers, utilities and other stakeholders to make e-mobility a global reality. Since our founding in 2007, ChargePoint has focused solely on making the transition to electric easy for businesses, fleets and drivers. ChargePoint offers a once-in-a-lifetime opportunity to create an all-electric future and a trillion-dollar market. At ChargePoint, we foster a positive and productive work environment by committing to live our values of Be Courageous, Charge Together, Love our Customers, Operate with Openness, and Relentlessly Pursue Awesome. These values guide how we show up every day, align, and work together to build a brighter future for all of us. Join the team that is building the EV charging industry and make your mark on how people and goods will get everywhere they need to go, in any context, for generations to come. Senior Manager, Power Electronics ChargePoint is looking for a creative and versatile Staff Power Electronics Engineer to help ensure that our products meet high design, development, and production quality. The role will play a key cross-functional role to drive many aspects, including the development and production of high-quality power systems. • Architect and design high-power AC and DC systems for consumer and commercial EV chargers, • Collaborate with engineers in the development of high-power AC to DC and DC to DC converters, • Design and develop advanced soft switching 40-100 kW, up to 2000 VDC multi-level converters, • Design and develop a multi-level 100-200 kW, up to 2000 VDC four-quadrant grid tie inverter complying with grid interactive regulations in the EU and NA, • Responsible for all aspects of product design, including modelling, key component selection, schematic capture, PCB layout, code development, magnetics design, thermal design, regulatory and compliance considerations, and DFM, • Utilize power topologies such as LLC, phase-shifted full bridge, flyback, forward, multi-level converters, including PFC (single phase and three phase), and associated techniques such as ZVS/ZCS, • Model power designs using analysis tools such as PLECS, MATLAB, and Spice. Create designs based on both off-the-shelf integrated circuit controllers, FPGAs / PLDs, and DSP digital control using embedded software development experience, • Work effectively with cross-functional teams to resolve early (architectural) and late (lab, test & validation), • Ensure high reliability of the product under stress conditions and environments for extended periods, • M.S. required (PhD desired) in Engineering (electrical, computer, or electronics), • 8+ years of experience in bringing power electronics products to market, • Strong electrical/electronic design skills and understanding of system-level engineering tradeoffs, • Experience designing AC/DC DC/DC power conversion systems, • Able to drive solutions across software, mechanical, power, and thermal boundaries to assure great results, • Experience working with x-functional teams: mechanical, software, and test, • Current knowledge of industry standards for consumer and industrial products, • Knowledge of EV charging standards is a plus, • Some travel is expected. Campbell, CA ChargePoint is committed to fair and equitable compensation practices. The targeted US salary range for roles at this operating level is $170,000 to $200,000. This range represents base salary and does not reflect equity, benefits or variable pay where applicable. Actual base salaries are based on several factors unique to each candidate, including but not limited to skill set, experience, certifications and specific work location We are committed to an inclusive and diverse team. ChargePoint is an equal opportunity employer. We do not discriminate based on race, color, ethnicity, ancestry, national origin, religion, sex, gender, gender identity, gender expression, sexual orientation, age, disability, veteran status, genetic information, marital status or any legally protected status. If there is a match between your experiences/skills and the Company needs, we will contact you directly. ChargePoint is committed to fostering an inclusive workplace that welcomes and supports all qualified individuals. In alignment with this commitment, we ensure that persons with disabilities are provided with reasonable accommodations throughout the employment process. If you need a reasonable accommodation to participate in the application or interview process, to perform essential job functions, or to access any other benefits and privileges of employment, please contact us at accommodations@chargepoint.com. ChargePoint is an equal opportunity employer. Applicants only - Recruiting agencies do not contact.

The application window is expected to close on: 05/29/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This position requires that you live within commuting distance of our San Jose, CA office and commute to the office 5 days per week. Cisco Silicon One (#CiscoSiliconOne) is a business organization with a long track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world's most complex networks and carry over 90% of IP traffic. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. We are a highly specialized ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our substrates use the latest 2.5D fanout technologies for large-scale integration, using the latest signaling and data transfer technologies. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry! Define, design and take end to end Front-End ownership of ASIC subsystems to be deployed in a range of Cisco platforms. Contribute to a multi-disciplined engineering team to meet the power, performance, and area goals for products. Help define the process, methods, and tools for design and implementation of complex developments. Work on some of the most challenging problems in high-performance silicon for hyperscale infrastructure. Design and implement high-frequency, high-performance RTL in Verilog / System Verilog, meeting aggressive timing, power, and area targets. Lead design specifications and technical reviews, ensuring architectural clarity and high-quality implementation. Drive technical execution across architecture, design, verification, and physical implementation teams to deliver robust silicon. Collaborate closely with verification and physical design teams to close functional coverage, timing, and integration challenges. Mentor engineers and elevate engineering rigor, design quality, and technical execution across the team. Lead debug and root-cause analysis across simulation, system bring-up, and post-silicon validation. Creates re-usable code that promotes efficiencies in new ways Influence system architecture and key design decisions across complex ASIC subsystems. Bachelor's degree in Electrical or Computer Engineering and 7+ years of ASIC design experience, or Master's degree in Electrical or Computer Engineering and 4+ years of ASIC design experience. ASIC design experience, delivering silicon from microarchitecture, specification, and RTL coding through tape-out with multiple ASIC tape-outs at advanced technology nodes. Strong expertise in high-performance RTL design using Verilog/SystemVerilog. Deep understanding of timing closure, power optimization, and clock gating techniques. Experience with ASIC development flows including simulation, synthesis, and static timing analysis. Strong documentation, problem-solving, and technical communication skills. Experience working cross-functionally and collaborating with various technical teams. You are a problem solver who loves to tackle new challenges and a self-starter who is highly motivated and thrives on innovative technology. You are a strong communicator in a team setting, enjoy working in a dynamic team environment, and are an out-of-the-box thinker. At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $165,000.00 to $241,400.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $165,000.00 - $277,600.00 Non-Metro New York state & Washington state: $146,700.00 - $247,000.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

PsiQuantum'smission is to build the first useful quantum computers-machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. Our architecture and approachisbased on silicon photonics. Byleveragingthe advanced semiconductor manufacturing industry-including partners like GlobalFoundries-we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photonsdon'tfeel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. In 2024,PsiQuantumannounced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining-and that now is the time to scale. PsiQuantumalso develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. Quantum computing is not an extension of classical computing. Itrepresentsa fundamental shift-and a path to mastering challenges that cannot besolvedany other way. The potential is enormous, and we have a clearpathto make it real. Come join us to build the operating system for the world's first useful quantum computer! Job Summary: The OS Core Team at PsiQuantum works closely alongside engineers and scientists in the electronics, system architecture, and validation teams and is responsible for building the scalable, distributed, fault-tolerant control plane and operating system for utility scale photonic quantum computers. Our team is responsible for orchestration, scheduling, kernel architecture, co-design, calibration, validation, providing abstractions, systems, and operating software for the immense heterogenous fabric of co-processors, networks, and photonics that are critical to the success of our company's goal of building the world's first useful quantum computer. As a Senior Software Engineer, Calibration & Control you will design and implement algorithms, controls, and software that keep our quantum processors in spec 24O7x365. Responsibilities: Develop and implement software for control of photonic quantum computers in Rust. Design and architecture of system software. Participate in design and code reviews. Collaborate across software, hardware, and research teams at PsiQuantum. Testing and maintenance of control software. Champion and serve as an exemplar of good software development practices at PsiQuantum. Experience/Qualifications: Required skills and experience: 15+ years experience with Rust or C++ in a system software context. Architecture and implementation of system software for HPC, robotics, AI, quantum computing, semiconductor fabrication, or control systems. Proven track record of developing and shipping reliable, performant software in a high scale or mission critical context. Bachelors degree in a technical discipline preferred, or equivalent experience. Ways to stand out: Experience in high performance computing. Experience in computer architecture. Experience in high performance networking. Experience building operating systems, compilers, or kernels. Experience interfacing with ASICs and/or FPGAs in complex/high-performance systems or an edge-computing context. Experience with Nix. Experience with highly scalable distributed systems in a reliability and up-time critical environment. Familiarity with quantum control. PhD in a related technical discipline is a plus, but not required. [We are open to adjusting the compensation to experience level] PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws. Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to _. We are not accepting unsolicited resumes from employment agencies. The ranges below reflect the target ranges for a new hire base salary. One is for the Bay Area (within 50 miles of HQ, Palo Alto), the second one (if applicable) is for elsewhere in the US (beyond 50 miles of HQ, Palo Alto). If there is only one range, it is for the specific location of where the position will be located.Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future. U.S. Base Pay Range $180,000—$205,000 USDBay Area Pay Range $200,000—$220,000 USD

The application window is expected to close on: 05/31/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This position is onsite in San Jose, with approximately 10% travel to Asia. Common Hardware Group (CHG) Wireless is responsible for the Cisco Enterprise Access Point Portfolio. As part of the wireless engineering group, you will collaborate with multi-functional teams-including Hardware Design, Antenna/Compliance, Power Engineering, Signal Integrity, EMC/EMI, and Mechanical Design-to deliver industry-leading wireless products. Lead hardware New Product Introduction (NPI) for Cisco Enterprise Access Point programs, from architecture definition to mass production. Drive the design and implementation of complex power systems, including Board-Mounted Power and Front-End power solutions. Optimize power stages (buck, buck-boost, flyback, LLC) for maximum efficiency and thermal performance. Author Product Requirement Documents (PRDs), participate in RFQs, and iterate on schematics and layout designs. Perform thorough validation using stability analyzers, oscilloscopes, and programmable power sources. Provide technical mentorship to the team regarding power topologies, analog design, and component selection. Control product schedules through the NPI cycle. Coordinate with Mechanical, Sourcing, Packaging, Certification, and Quality teams. Perform and review failure analysis (FA), root cause analysis (RCA), and corrective action reports (CAR/8D). Ensure all designs meet DFM (Design for Manufacturing) and quality assurance standards. Connect with firmware and mechanical teams to ensure power supply designs are fully integrated and thermally compliant. Bachelor's degree in electrical or computer engineering or power electronics with 8+ years of experience, or master's degree with 6+ years of experience, or PhD with 3+ years of related experience. Experience in end-to-end product development, having launched at least 1 hardware product. Experience in RF system design and wireless standards. Experience with power electronics and analog design, specifically with topologies such as buck, buck-boost, flyback, and LLC. Experience in industry-standard tools such as Concept, Allegro, LTspice, PSpice, Simplis, Mathcad, PowerDC, SIWave, Ansys, or Hyperlynx. Demonstrated interest and expertise in solving complex, high-density Board-Mounted and Front-End power hardware challenges. Experience with Stability analyzers, oscilloscopes, function-generators, electronic loads, and bench programmable AC/DC power sources. Knowledge of firmware-level power management and mechanical/thermal design constraints in power supplies. Strong understanding of component selection, materials, manufacturing processes, and DFM/QA methodologies. Experience with antenna design and the compliance/certification process for Wi-Fi products. Familiarity with manufacturing build management and factory processes. At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $168,800.00 to $241,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $168,800.00 - $277,400.00 Non-Metro New York state & Washington state: $148,800.00 - $248,200.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

Fortinet is an equal opportunity employer. We value diversity in our company, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, age, military/veteran status or any other applicable legally protected characteristics in the location in which the candidate is applying. Job Description Fortinet is developing a powerful platform that combines the security for the datacenter and carrier solutions that enables organizations to efficiently manage, scale and secure their networks. This QA Engineer will be part of this exciting development and will be working with a strong technical team that has experience delivering the solutions to large carriers. Participate in building a High-end firewall platform for data centers/Carriers that provides high throughput packet processing to the service provider using latest networking technologies. Our ideal candidate is willing to learn new skillsets and take on challenges. Job Duties: • Conduct functional validation on new generation cyber security and networking products using a blend of manual and auto-testing methodologies., • Execute testing activity alignment with established CI/CD build process., • Design, configure and optimize scalable hardware, virtual environment and network infrastructure., • Explorer FortiGate features and develop new test approach with necessary test tools and skills., • Work closely with Developers, QA, and others to understand new features, user cases., • Identify, document, and track software defects found during testing., • Write and maintain automation scripts., • Passionate, motivated, and always willing to learn and explore new technologies., • Thrive in a collaborative, fast-team environment with excellent communication and problem-solving skill Job Experience Required: • 3+ years of testing in QA engineering with a blend of manual and automation testing., • Strong knowledge on automation testing framework, Python, Pytest, Robot framework, and Linux Bash scripting., • Solid understanding of TCP/IP, routing and switching, DNS, DHCP, VPN, HA., • Experience with network infrastructure, hardware, and troubleshooting., • Hands-on experience on VM configuration, with ESXI, Proxmox system or Docker container., • Understanding of general QA procedures and methodologies., • Able to manage priority and delivery high quality design under tight deadline, • Strong interpersonal and collaboration skills with ability to work effectively with engineering and cross functional team, • Have any networking certification like FCA/FCP/FCSS, CCNA/CCNP etc. is a plus., • New graduate with AI related skill is preferred. Educational Requirement: • Bachelor's or master's degree in computer science/Engineering, or equivalent Must be authorized to work in the U.S. without sponsorship The US base salary range for this full-time position is $130,000-$150,000. Fortinet offers employees a variety of benefits, including medical, dental, vision, life and disability insurance, 401(k), 11 paid holidays, vacation time, and sick time as well as a comprehensive leave program. Wage ranges are based on various factors including the labor market, job type, and job level. Exact salary offers will be determined by factors such as the candidate's subject knowledge, skill level, qualifications, experience, and geographic location. All roles are eligible to participate in the Fortinet equity program; Bonus eligibility is reviewed at time of hire and annually at the Company's discretion.

The application window is expected to close on: 06/15/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. CHG BSP Software The Common Hardware Group (CHG) at Cisco is seeking skilled software engineers to join our Diagnostic/BSP team, responsible for ensuring the reliability and performance of our world-class hardware. Our team develops software for Cisco's network switches and routers, which feature advanced application awareness to build a flexible and agile network infrastructure. These capabilities support multi-layered responses to the diverse workload demands of AI and ML. This is a unique opportunity to grow your technical skill set and gain visibility and recognition across cross-functional teams within Cisco. We value motivated individuals who enjoy solving complex challenges and thrive in a collaborative, innovative environment. Architect and develop BIOS, BSP, and diagnostics for Cisco's Core and Edge routing products. Design, develop, and test device drivers for FPGA and networking peripherals. Develop and execute software test plans. Collaborate with cross-functional teams to debug prototypes andvalidatesoftware. Innovate and drive unique software, hardware, and technology solutions with a global impact on Cisco's product portfolio. Utilize deep technicalexpertisefor complex consultations and act as an expert both internally and externally. Shape technology and industry trends to enable a competitive advantage and ensure long-term business impact. Bachelor's degree in Electrical Engineering, Computer Science, or related field with 15+years experience, orMaster'sdegree with 12+years experience. Proficient in C, C++, and Python programming for embedded systems. Experience in hardware and device driver development, including Linux hardware bring-up,multi-threading, event handling, and state machine implementation. Experience with Sonic, ONIE, BMC, IPMI, and/or Redfish technologies. Skilled in developing, debugging, andvalidatingembedded systems using protocols such asI2C, SPI, UART,PCIe, GPIO. Proficient in kernel debugging tools such as GDB and KGDB. Experience leading board bring-up, validation, and debugging of embedded systems. Ability to develop software from concept through delivery for large-scale, high-bandwidth systems. Strong troubleshooting skills for software defects from kernel modules to applications. Experience in collaborative system design, specification writing, andrequirementsreview. Commitment to quality, mentoring, and continuous learning in networking, optics, and embedded systems. AI/ML experience and knowledge of Layer 2/3 network protocols, network processors, optical networking, secure-boot, open-source tools, CMIS, and SFF standards (SFP, QSFP). At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $231,400.00 to $331,800.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $231,400.00 - $381,600.00 Non-Metro New York state & Washington state: $222,900.00 - $343,600.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Engineer in San Jose, CA with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do • Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs., • Responsible for development of innovative DFT IP in collaboration with the multi-functional teams and play a key role in full chip design integration with the testability features coordinated in the RTL. Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows., • Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug strategies., • The job requires the candidate to have the ability to craft and debug with minimal mentorship. Who You Are You are an ASIC Design for Test Hardware Engineer with 4+ years of related work experience with a broad mix of technologies including: Minimum Requirements: • A Bachelor's or Master's Degree, in Electrical or Computer Engineering required with at least 10 years of good experience of latest innovative trends in DFT, test and silicon engineering., • Good experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan., • Good experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime, • Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design., • Experience working with Gate level simulation, debugging with VCS and other simulators., • Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687, • Strong verbal skills and ability to thrive in a multifaceted environment, • Scripting skills: Tcl, Python/Perl. Preferred Skills: • Verilog design experience - developing custom DFT logic & IP integration; familiarity with functional verification, • DFT CAD development - Test Architecture, Methodology and Infrastructure, • Test Static Timing Analysis, • Post silicon validation using DFT patterns.

Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World's Most Experienced Driver-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo's fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. The Perception Team at Waymo builds the system that "sees" the world around the self-driving car. We conduct novel research to address real-world perception problems and collaborate with research teams at Alphabet. Here at Waymo, we have access to millions of miles of driving data from a diverse set of sensors, enabling researchers like you to develop complex models and techniques at scale. Improvements deployed to our system can immediately advance our large fleet of autonomous vehicles. Within Perception, the Sensor Health team's job is to make sure that sensors "just work" for the entire self-driving car software stack. We make sure that all sensors are properly calibrated and consistently monitored at all times. We process data from next-generation sensors on next-generation vehicle platforms and work closely with both hardware and software teams to provide the best possible sensor data from our sensors to our upstream customers. To this end, we develop sensor data alignment and calibration algorithms, a growing sensor health backend, and deploy our systems both into the Waymo Driver and our log processing backend. In this hybrid remote/in-office role, you will report to a Senior Staff TLM. You will: • Lead and build a team of ML engineers in charge of reliable sensing anomaly detection and calibration, • Build a data flywheel to automatically generate suitable training data for rare instance sensor degradation events using VLMs, • Own the entire sensor validation stack end to end, • Drive and accelerate collaborations between perception, system engineering, evaluation, and Alphabet teams You have: • MS in Computer Science, Robotics, Math, Physics or equivalent industry experience, • 6+ years of experience in designing, training, and deploying ML-driven real-time robotics systems, • 4+ years of experience leading technical teams and setting technical directions, • 2+ years of people management experience We prefer: • PhD in Computer Science, Robotics, Math, Physics, or a related technical field, • Experience in robotics, autonomous systems, or related automotive industries., • Experience with various sensor modalities (e.g., LiDAR, radar, cameras) and their unique challenges., • Familiarity with early fusion multi modal sensor models and their development challenges, • Experience with rare instance or zero-shot detection problems The expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process. Waymo employees are also eligible to participate in Waymo's discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range$238,000—$302,000 USD

The application window is expected to close on: 07/03/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. You will be part of the Silicon One development organization as an ASIC implementation engineer in San Jose, CA. As a member of this team you will be involved in crafting cutting edge next generation networking chips. You will be the lead to drive the DFT/DFx and quality process through the early product life cycle: the architecture definitions, RTL implementation and quality checks. You will also be engaged in relevant development of flow/methodologies, test plans, tape-out sign-off requirements, post silicon validation, production yield & DPPM support. • Responsible for development of the comprehensive Design-for-Test (DFT) & DFx solutions and architectures that support ATE screening, in-system test, debug and diagnostics needs of the design., • Lead the RTL implementation from the architecture specifications and required RTL quality checks implementations., • Work with the team on Innovative Hardware DFT & test strategy aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug methodologies and standards., • Work with the team on DFT challenge identification, cross-functional solution brainstorming and implementation plan development, and lead a team of engineers to deliver expected implementations on schedule., • Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 10+ years of ASIC Hardware Development experience., • Prior experience on hardware design specifications and verification plan/matrix, RTL & testbench implementations., • Prior experience on Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan., • Post-silicon test bring up and debug experience; Ability to analyze and root cause test failures on silicon., • Prior experience on RTL QA checks, including lint & CDC, • Scripting skills: Tcl, Python/Perl. At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $210,600.00 to $305,100.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $210,600.00 - $350,800.00 Non-Metro New York state & Washington state: $189,300.00 - $312,200.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

The application window is expected to close on: 06/30/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Hardware Engineering Technical Leader (onsite) - 2014979 position requires onsite work activity at San Jose CA office Cisco Hardware Engineers develop and work with Next Generation Technology to build Cisco Hardware products keeping in mind the user experience and in accordance with IEEE standards, and industry best practices. Hardware Engineers serve a range of roles at Cisco from IP Creators and architects creating industry standards, to Solution Integrators driving cross-functional teams to go from concept to production, as well as providing expertise in Solution Verification and ensuring that our products meet Cisco and Industry quality standards. They drive innovation across the large CISCO portfolio, including but not limited to System/Board Design, Circuit Board Layout, Hardware Automation, Validation and Test, Signal Integrity and Power Design. They work cross functionally with system designers, diagnostics engineers, customer escalation engineers, & external vendors to ensure robust test methodology & timely issue mitigation resulting in high product quality and enable next generation solutions. They drive innovation across Cisco's hardware portfolio and enables next generation solutions through IP development, research, and challenging the status quo within the industry (finding ways to optimize cost, performance, and quality. Meet the Team: Cisco Systems is seeking a System Level Test Engineering Technical Lead to validate and ensure the quality of next-generation networking platforms, including switches, routers, and data center systems. What You'll Do: In this role, you will drive end-to-end system validation across hardware, firmware, and software stacks, ensuring robust performance, scalability, and reliability under real-world and stress conditions. Key Responsibilities: Leadership • Leads the innovation, design and architecture of new hardware products, services and solutions., • Re-enforces guidelines/standards within and outside of ownership., • Oversees development of testing and issue resolution approach, and coordinates with appropriate stakeholders to address issues., • Develops approach to verifying products against Cisco and industry quality standards., • Provides technical knowledge to engineering teams where needed to support production, installation and configuration of complex hardware products., • Mentors peers or others on the team., • Facilitates/encourages knowledge sharing in the team (e.g., brownbags, demos, design sessions). System Validation & Integration • Define and execute system-level validation strategies for complex networking platforms, • Validate end-to-end functionality across hardware, OS, and networking software stacks, • Perform feature, regression, interoperability, and scale testing Test Development & Automation • Develop automated test frameworks using Python, C/C++, or similar languages, • Build scalable validation environments for high-throughput networking systems, • Integrate tests into CI/CD pipelines for continuous validation Performance & Scale Testing • Design and execute tests for throughput, latency, packet loss, and scale limits, • Validate system behavior under high traffic loads and real-world network conditions, • Analyze system performance across L2/L3 protocols and data center workloads Debug & Root Cause Analysis • Debug complex issues spanning ASICs, firmware, drivers, and network OS, • Perform root cause analysis using logs, traces, and lab instrumentation, • Collaborate with design and software teams to resolve issues efficiently Cross-Functional Collaboration • Partner with ASIC, hardware design, software, and architecture teams, • Influence design decisions by identifying system-level risks early, • Work with customers and field teams to reproduce and resolve issues, • Drives innovation on medium-to-large features from technical design through completion and mentors others. • Drives the Hardware Engineering strategy within the group and Cisco, and ensures cross functional collaboration on projects. Minimum Qualifications • Bachelor's, Master's or Ph.D. degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, • 8+ years of experience in ASIC bring-up, system validation, networking test, or hardware/software integration, • Experience with Linux systems and debugging tools, • Programming/scripting experience (Python, C/C++, or similar), • Hands-on experience with system-level debugging and familiarity with lab equipment like MMs, Oscilloscopes, • Experience with Test Data Analysis and familiarity with tools like jmp, pandas or other data analysis tools Preferred Qualifications: • Familiarity with high-speed interfaces (Ethernet 25G/100G/400G, PCIe), • Product and Test Engineering background, • Experience testing network operating systems (NX-OS, IOS-XR, or similar), • Knowledge of traffic generators (Ixia, Spirent) and network test tools, • Knowledge of networking fundamentals (TCP/IP, routing, switching), • Experience with automation frameworks and large-scale testbeds At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $168,800.00 to $241,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $168,800.00 - $277,400.00 Non-Metro New York state & Washington state: $148,800.00 - $248,200.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

PsiQuantum'smission is to build the first useful quantum computers-machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. Our architecture and approachisbased on silicon photonics. Byleveragingthe advanced semiconductor manufacturing industry-including partners like GlobalFoundries-we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photonsdon'tfeel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. In 2024,PsiQuantumannounced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining-and that now is the time to scale. PsiQuantumalso develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. Quantum computing is not an extension of classical computing. Itrepresentsa fundamental shift-and a path to mastering challenges that cannot besolvedany other way. The potential is enormous, and we have a clearpathto make it real. Come join us. Job Summary: At PsiQuantum we are developing and testing prototype quantum computer systems with complex software and hardware including integrated photonics, optics, electronics, and cryogenics subsystems. The Quantum Systems Validation team is responsible for characterizing the performance of integrated quantum optical systems and subsystems. The Quantum Systems Validation Engineer is responsible for developing and executing tests to validate the design of these systems, verify their correct functioning. Responsibilities: • Design and execute tests to deliver engineering data and validate photonic quantum computer systems performance., • Work with design teams to develop, define, and document validation objectives and ensure that the system design supports validation requirements., • Develop calibration, self-test, and control procedures for quantum photonic systems. Develop and document requirements for the software and electronics teams to implement procedures and manage data., • Analyze, reduce, and deliver experimental data. Work with other engineering teams to ensure that the data informs engineering models for system performance., • Debug software and hardware and work with other engineering teams to conduct failure analysis and resolve design or manufacturing issues as appropriate., • Communicate validation outcomes broadly to internal stakeholders and help guide corrective actions., • Support and provide technical direction to junior quantum validation engineers. Lead and coordinate complex validation activities involving multiple members of the validation team. Experience/Qualifications: • M.S. level (Ph. D. preferred) or equivalent experience in Electrical Engineering, experimental Physics, or a related field with significant work experience in industry or academia., • Demonstrated ability to design and execute complex experiments or engineering tests in a cross-functional environment., • Demonstrated technical leadership in, • Broad technical knowledge with ability to dive deep into technical aspects of our systems including hardware, software, precision measurement, and photonics., • Software development for instrumentation, controls, and test equipment (python preferred)., • Demonstrated experience with some, or all, of the following preferred:, • Quantum optics, single photon generation and detection, • Quantum characterization, verification, and validation, • Quantum information theory, • Integrated silicon photonics, • Mixed-signal, analog, RF electronics design and test, • Electro-optical device design and test, • Proven team player with an ability to work effectively across departments, sites, time zones., • Ability to work independently with limited direction and own responsibility for delivering validation objectives., • Excellent verbal and written communication skills with an ability to communicate effectively to a variety of audiences including senior leadership and technical experts., • Demonstrated interest in PsiQuantum's mission and vision for quantum computing, with an ability to contribute within a fast-paced start-up environment consistent with PsiQuantum's values of communication, collaboration, respect, results, and challenge. PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws. Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to _. We are not accepting unsolicited resumes from employment agencies. The ranges below reflect the target ranges for a new hire base salary. One is for the Bay Area (within 50 miles of HQ, Palo Alto), the second one (if applicable) is for elsewhere in the US (beyond 50 miles of HQ, Palo Alto). If there is only one range, it is for the specific location of where the position will be located.Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future. U.S. Base Pay Range $135,000—$160,000 USDBay Area Pay Range $161,400—$182,000 USD

PsiQuantum'smission is to build the first useful quantum computers-machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. Our architecture and approachisbased on silicon photonics. Byleveragingthe advanced semiconductor manufacturing industry-including partners like GlobalFoundries-we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photonsdon'tfeel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. In 2024,PsiQuantumannounced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining-and that now is the time to scale. PsiQuantumalso develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. Quantum computing is not an extension of classical computing. Itrepresentsa fundamental shift-and a path to mastering challenges that cannot besolvedany other way. The potential is enormous, and we have a clearpathto make it real. Come join us. Job Summary: PsiQuantum is seeking a high-speed photonics experimentalist to develop phase modulators, switches, and other active photonic components for the world's first fault-tolerant quantum computer. In this role, you will own the characterization, analysis, and performance validation of high-speed active photonic devices,circuits, and subsystems. You will work closely with teams across electronics, manufacturing, test, packaging, and system validation to translate device-level results into robust system-level performance. The ideal candidate will have deep hands-on experience with high-speed electro-optic characterization and a strong understanding of passive and active photonic components, including electro-optic phase shifters, switches, modulators, and related integrated photonic devices. The hiring level and scope for this role will be calibrated to the selected candidate's experience and strengths. Candidates with relevant PhD/postdoctoral exposure, as well as those with additional industry experience, are encouraged to apply. Responsibilities: • Own high-speed electro-optic characterization and validation of active photonic devices, circuits, and subsystems, including electro-optic phase shifters, switches, modulators, and related components., • Tests include S-parameter measurements, high-speed time domain waveform measurements, switching response, bandwidth, insertion loss, extinction ratio, and related device- and circuit-level metrics., • The candidate will need to work across different test configurations, including wafer-level probing, connectorized photonic/electronic devices, packaged assemblies, and integrated builds incorporating photonic chips, PCBs, drivers, FPGAs, firmware, and related hardware., • Translate device requirements, system needs, and expected learning objectives into executable characterization plans., • Analyze and model measurement data to understand device, circuit and subsystem behavior, diagnose performance limitations, and recommend improvements., • Develop new characterization methods, automation tools, and analysis workflows as needed., • Collaborate closely with multidisciplinary teams across photonics, electronics, packaging, manufacturing, test, firmware, and system validation to help design, build, test, and improve high-performance photonic chips and assemblies., • Document measurement methods, calibration procedures, results, and conclusions clearly and rigorously., • Mentor junior team members. Experience/Qualifications: • MS or PhD in electrical engineering, applied physics, optical engineering, photonics, or a related technical discipline. Industry experience is a plus., • Deep understanding of integrated photonic devices and circuits, including passive and active components such as waveguides, electro-optic phase shifters, switches, modulators, and related high-speed photonic devices., • Hands-on experience with standard RF, microwave, and optical test equipment, including oscilloscopes, signal generators, VNAs, high-speed probes, optical power meters, lasers, photodetectors, and related laboratory equipment., • Experience with high-speed electro-optic measurements, including electro-optic S-parameters, high-speed waveform measurements, bandwidth, and related device- and circuit-level metrics., • Strong understanding of RF measurement concepts, including S-parameters, impedance matching, bandwidth, signal integrity, calibration, de-embedding, and measurement uncertainty., • Experience developing automated test systems, measurement scripts, data pipelines, or analysis tools for photonic, RF, or high-speed electro-optic characterization., • Strong data analysis skills, including data visualization, statistical interpretation of measurement results, and data-driven decision-making., • Ability to translate device requirements and experimental learning goals into clear test plans, execute measurements, analyze results, and communicate conclusions., • Experience with one or more active photonic material platforms, such as thin-film lithium niobate, BTO, doped silicon, InP, GaAs, AlGaAs, InGaAsP, or related electro-optic platforms, is a plus., • Understanding of photonic-electronic interfaces and integrated build architectures, including PCBs, RF interconnects, high-speed drivers, FPGAs, TIAs, firmware-controlled test systems, wirebonds, and related electronics, is a plus., • Experience with photonic packaging and assembly-level integration is a plus., • Experience designing, simulating, or modeling photonic and electro-optic components using tools such as Ansys Lumerical, Tidy3D, COMSOL Multiphysics, Meep, or similar platforms is a plus; experience with RF or high-speed electronic simulation tools such as HFSS, ADS, Cadence AWR, or SPICE-based tools is also a plus., • Familiarity with high-volume or manufacturing-oriented test environments, including repeatability, reproducibility, calibration control, and measurement process documentation, is a plus., • Able to work independently with limited direction while maintaining strong alignment with project goals and cross-functional priorities., • Collaborative and effective in a multidisciplinary engineering environment spanning photonics, electronics, packaging, manufacturing, test, firmware, and system validation., • Strong project planning and execution skills, including the ability to manage priorities, track progress, and deliver high-quality results on schedule., • Excellent written and verbal communication skills, with the ability to communicate technical results clearly to a range of audiences., • Strong critical thinking, analytical, creative, and detail-oriented problem-solving skills., • Comfortable operating in a fast-paced startup environment with evolving requirements and ambitious technical goals. PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws. Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to _. We are not accepting unsolicited resumes from employment agencies. The ranges below reflect the target ranges for a new hire base salary. One is for the Bay Area (within 50 miles of HQ, Palo Alto), the second one (if applicable) is for elsewhere in the US (beyond 50 miles of HQ, Palo Alto). If there is only one range, it is for the specific location of where the position will be located.Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future. U.S. Base Pay Range $110,000—$145,000 USDBay Area Pay Range $152,000—$175,000 USD

The application window is expected to close on: 08/01/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym, healthcare, and cafe, social interest groups, and philanthropy), with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide. • Participate in and contribute to chip architecture definition and discussions., • Author design specifications and participate in micro-architecture specification reviews., • Implement Verilog RTL to meet timing and performance requirements., • Help define, evolve, and support our design methodology., • Mentor junior engineers on performing project tasks and problem solving., • Collaborate with the verification team to address design bugs and close code coverage., • Work closely with physical design team to close design timing and place-and-route issues., • Triage, debug, and root cause simulation, software bring-up, and customer failures., • Perform diagnostic and post silicon validation tests in the lab., • Bachelor's degree in Electrical or Computer engineering and 10+ years of ASIC Design experience or Master's degree in Electrical or Computer engineering and 8+ years of ASIC Design experience., • Verilog/System Verilog programming experience., • Interactive and waveform debug experience., • Experience resolving setup and hold timing violations with RTL modification., • Experience developing micro-architecture solutions and RTL implementation. Experience with digital design principles and microarchitecture concepts such as buffering and scheduling architectures. Experience with design quality checks including CDC (Clock Domain Crossing) and Spyglass static analysis. Scripting experience (Python, Perl, TCL, shell programming). At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $183,800.00 to $263,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $183,800.00 - $303,100.00 Non-Metro New York state & Washington state: $163,600.00 - $269,800.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

The application window is expected to close on: 07/06/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Cisco Component Quality and Technology team provides outstanding customer value through technical innovation and quality solutions. We are seeking a driven and experienced technical authority in memory and storage components application to join our technical team. You will work directly with Cisco design, manufacturing, and quality engineering teams, as well as component vendors. This is a hybrid position. Your Impact As a member of our Component Quality and Technology team, you will have the opportunity to serve as Cisco's domain authority in memory technologies, advising internal and external technical partners on the selection, validation, and qualification of memory components for Cisco products. You will analyze and influence vendor roadmaps, participate in technical reviews and selection of memory components for Cisco's next-generation products. You will influence Cisco's design and engineering team to ensure the next generation of memory are recommended and integrated into our solutions. Responsibilities Collaborate with Cisco's design teams to enhance and improve memory reliability, availability, and serviceability (RAS) features across Cisco platforms. Support supply chain and quality teams with technical expertise for supplier and component evaluations. Lead investigations and end-to-end failure analysis for components and system issues, working with vendors to define, implement, and verify corrective and preventive actions (8D, RCA, etc.). Minimum Qualifications: BS/MS in Electrical Engineering, Computer Engineering, or related fields. 5+ years experience in memory design/application OR Field Application Engineering. Strong familiarity with JEDEC memory standards to guide and influence design decisions. Strong knowledge of DRAM ECC methodologies, including Partial Chipkill (PCLS) and Single Device Data Correction (SDDC) techniques, to enhance memory reliability. Knowledge of various DRAM types (e.g., DDRx, HBM) used in server and networking applications. Preferred Qualifications Strong problem-solving skills and effective conflict resolution abilities. Experience with semiconductor device reliability testing and characterization methods, such as HTOL, ELFR, LU and ESD Experience in investigating component failures across NPI, mass production, and field returns, with knowledge of FA techniques. At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. The starting salary range posted for this position is $140,800.00 to $183,000.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $140,800.00 - $210,500.00 Non-Metro New York state & Washington state: $128,200.00 - $186,700.00 • For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World's Most Experienced Driver-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo's fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. Hardware Engineering is a diverse, innovative, and collaborative group of electrical, mechanical, reliability, software and vehicle engineers. We design, build, and perfect the products which are the eyes and ears of Waymo's self-driving systems, and integrate those products into vehicle platforms. We're seeking curious and talented teammates to keep us moving in the right direction. In this hybrid role, you will report to a Design Manager. You will: • Conduct rigorous geometric evaluations of sensor placement hypotheses, providing the thorough analysis necessary to guarantee our perception requirements are fully supported, • Evaluate and define multi-modal sensor placement strategies on existing and new vehicle platforms to maximize the field of view and operational design domain of the Waymo Driver, • Closely collaborate with cross-functional engineering teams to help define, generate, and refine hardware and integration methods for our sensor suites, • Oversee the enhancement and adaptation of our analytical tools and reporting to boost operational capacity and precision as we continue to grow, • Utilize your understanding of object detection and classification to ensure that the physical placement of sensors meets the rigorous requirements of our perception software, • Leverage your knowledge of passenger vehicle geometry and integration methods to collaborate with mechanical design, packaging, industrial design, product teams to ensure optimal sensor placement, robust requirement alignment and verification of integrated sensor performance You have: • Education: Bachelor's degree in Mechanical Engineering, Mechatronics Engineering, or Physics (Required), • Experience: 5-10 years of relevant professional industry experience in the Automotive or Aerospace & Defense sectors, • Sensor Subject Matter Expertise: Understanding of multi-modal sensing functionality, specifically how cameras, LiDARs, and radars operate as individual hardware units, • Systems Architecture: Strong grasp of how various sensing modalities complement each other and work together within an autonomous vehicle architecture, • Perception Fundamentals: A foundational understanding of how sensor data translates into perception capabilities, specifically regarding object detection and classification, • Expertise managing very large CAD (Computer Aided Design) assemblies & performing geometric layout analyses We prefer: • Advanced degree in Mechanical Engineering, Mechatronics Engineering, or Physics, • Experience with system engineering fundamentals: requirements definition, system design and architecture, trade studies, and verification and validation methods, • Experience working on large, complex systems and navigating ambiguity with multiple stakeholders while balancing accelerated timelines / implementation schedules, • Industrial Design / Studio sensitivity: we recognize that sensor aesthetics can be a polarizing topic, even if we appreciate their functionality, • A deep understanding of CAD tools, preferably CATIA, • Proficient at developing tasks and workflows that can be delegated to geometry creation (CAD) specialists, enabling you to focus on analysis and delivery Domestic travel: 5% - 10% The expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process. Waymo employees are also eligible to participate in Waymo's discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range$196,000—$242,000 USD