Intel jobs in Hillsboro, OregonCreate job alerts

Job Description • We are hiring immediately for full time COOK positions., • Location: Intel RA1 Cafe - 2501 NW 229th Avenue, Hillsboro, OR 97124 Note: online applications accepted only., • Schedule: Full time schedule. Monday - Friday, hours may vary. More details upon interview., • Requirement: Line cook, station cook, international cuisine, prep cook, and overall kitchen experience preferred., • *Internal Employee Referral Bonus Available, • Pay Range: $18.00 per hour to $22.00 per hour We Make Applying Easy! Want to apply to this job via text messaging? Text JOB to 75000 and search requisition ID number 1568756. The advertised program is a conversational recruiting assistant that helps you apply to jobs with Compass Group. Message frequency varies. Message and data rates may apply. Text STOP to opt out or HELP for help. Terms and conditions: http://olivia.paradox.ai/moSkg Application Deadline: applications are accepted ongoing until all openings are filled for this position. If an applicant is declined due to the position being filled, they may still be considered for future opportunities and are always welcome to reapply. Diversity of thought and inclusion for all is what drives our success - we invite you to start your journey with us today! Eurest is recognized worldwide for standards of service and excellence within the foodservice industry. Embracing an ownership mindset, Eurest leverages global resources, promotes a local presence and enriches the communities we serve. The Eurest Promise, "connect with people, inspire through food, create solutions, and live our promise," is exemplified throughout our organization. Eurest is proud to serve the world's most respected successful corporations, including many of the Fortune 500. Job Summary Summary: Prepares food in accordance with applicable federal, state and corporate standards, guidelines and regulations with established policies and procedures. Ensures quality food service is provided at all times. Essential Duties and Responsibilities: • Prepares high-quality food items according to standardized recipes and instructions to meet production, delivery and service schedules., • Serves meals or prepares for delivery by using correct portioning, meeting outlined standards, ensuring that food is at the correct temperature and is attractive and tasty. Tastes all prepared food items., • Uses established ticket collection procedures during service. Responsible for records from area worked during service periods., • Cleans kitchen after preparation and serving, maintaining high standards of cleanliness. Stores or discards excess food in accordance with safe food-handling procedures., • Keeps refrigerators and storerooms clean and neat. Ensures food and supply items are stored per standards., • Operates and maintains kitchen equipment as instructed., • Assists in production planning, record keeping and reporting as required., • Assists in the ordering and receiving of all food and supplies as required., • Reports needed maintenance, faulty equipment or accidents to the supervisor immediately., • Attends in-service and safety meetings., • Maintains good working relationships with coworkers, customers, administrators and managers., • Performs job safely while maintaining a clean, safe work environment., • Performs other duties as assigned., • Ensures proper presentation, portion control and maintenance of serving temperatures; follows HACCP standards., • Personal commitment to your own safety and that of others., • Abides by all Company policies and procedures including but not limited to:, • The use of a medium weight cut gloves when handling or using knives, peelers, choppers, mandolins or cleaning a slicer., • The use of oven mitts, fryer gloves or steamer gloves when handling hot pans from ovens, warmers or steamtables., • The use of slip-resistant shoes and proper lifting techniques. Associates at Eurest are offered many fantastic benefits. Full-time and part-time positions offer the following benefits to associates: Retirement Plan, Associate Shopping Program, Health and Wellness Programs, Discount Marketplace, Identity Theft Protection, Pet Insurance, Voluntary Benefits, including Critical Illness Insurance, Accident Insurance, Hospital Indemnity Insurance, Legal Services, and Choice Auto and Home Program Full-time positions also offer the following benefits to associates: Medical, Dental, Vision, Life Insurance/AD, Disability Insurance, Commuter Benefits, Employee Assistance Program, Flexible Spending Accounts (FSAs) Associates may also be eligible for paid and/or unpaid time off benefits in accordance with applicable federal, state, and local laws. For positions in Washington State, Maryland, or to be performed Remotely, click here or copy/paste the link below for paid time off benefits information. https://www.compass-usa.com/wp-content/uploads/2023/08/2023WageTransparencyEurest.pdf About Compass Group: Achieving leadership in the foodservice industry Compass Group is an equal opportunity employer. At Compass, we are committed to treating all Applicants and Associates fairly based on their abilities, achievements, and experience without regard to race, national origin, sex, age, disability, veteran status, sexual orientation, gender identity, or any other classification protected by law. Qualified candidates must be able to perform the essential functions of this position satisfactorily with or without a reasonable accommodation. Disclaimer: this job post is not necessarily an exhaustive list of all essential responsibilities, skills, tasks, or requirements associated with this position. While this is intended to be an accurate reflection of the position posted, the Company reserves the right to modify or change the essential functions of the job based on business necessity. Certain positions may require Florida Level 2 background screening. Details: https://info.flclearinghouse.com/ Applications are accepted on an ongoing basis. Eurest maintains a drug-free workplace. Req ID: 1568756 [[req_classification]]

Job Description • We are hiring immediately for a full time BARISTA position., • Location: Intel JF5 Cafe - 2111 NE 25th Avenue, Hillsboro, OR 97124 Note: online applications accepted only., • Schedule: Full time schedule. Monday - Friday, 7:00 am - 3:00 pm. More details upon interview., • Requirement: Hospitality experience required. *Internal Employee Referral Bonus Available • Pay Range: $17.00 per hour to $19.00 per hour We Make Applying Easy! Want to apply to this job via text messaging? Text JOB to 75000 and search requisition ID number 1564532. The advertised program is a conversational recruiting assistant that helps you apply to jobs with Compass Group. Message frequency varies. Message and data rates may apply. Text STOP to opt out or HELP for help. Terms and conditions: http://olivia.paradox.ai/moSkg Application Deadline: applications are accepted ongoing until all openings are filled for this position. If an applicant is declined due to the position being filled, they may still be considered for future opportunities and are always welcome to reapply. Diversity of thought and inclusion for all is what drives our success - we invite you to start your journey with us today! Eurest is recognized worldwide for standards of service and excellence within the foodservice industry. Embracing an ownership mindset, Eurest leverages global resources, promotes a local presence and enriches the communities we serve. The Eurest Promise, “connect with people, inspire through food, create solutions, and live our promise,” is exemplified throughout our organization. Eurest is proud to serve the world’s most respected successful corporations, including many of the Fortune 500. Job Summary Summary: Makes and serves coffee/espresso drinks and related food and beverage items. Handles food according to HACCP guidelines and standards for quality food-service operations. Interacts with customers and other employees in a friendly, courteous manner. Essential Duties and Responsibilities: • Prepares espresso orders for customers and catering using standard measures and recipes., • Enters orders accurately into POS device; accepts cash and charge payments., • Replenishes condiments, beverages and general supplies while maintaining cleanliness of service area., • Ensures proper presentation, portion control and maintenance of proper serving temperatures; follows HACCP standards., • Maintains sanitation and orderliness of all equipment, supplies and utensils., • Ensures proper food preparation by using approved recipes and following prescribed production standards., • Keeps display equipment clean and free of debris during meal service., • Cleans equipment and workstation thoroughly before leaving the area for other assignments., • Greets customers courteously and interacts in a manner to ensure customer satisfaction. Relays relevant concerns from customers to supervisors., • Serves customers quickly and efficiently, and prevents delays in serving lines., • Demonstrates a complete understanding of daily menu items and accurately explains them to customers., • Serves as an advocate of selling techniques to the customer by establishing good communication and assisting in the buying decision-making process., • Ensures all display foods are merchandised attractively per standards. Serves food neatly and attractively per standard., • Performs other duties as assigned. Associates at Eurest are offered many fantastic benefits. Full-time and part-time positions offer the following benefits to associates: Retirement Plan, Associate Shopping Program, Health and Wellness Programs, Discount Marketplace, Identity Theft Protection, Pet Insurance, Voluntary Benefits, including Critical Illness Insurance, Accident Insurance, Hospital Indemnity Insurance, Legal Services, and Choice Auto and Home Program Full-time positions also offer the following benefits to associates: Medical, Dental, Vision, Life Insurance/AD, Disability Insurance, Commuter Benefits, Employee Assistance Program, Flexible Spending Accounts (FSAs) Associates may also be eligible for paid and/or unpaid time off benefits in accordance with applicable federal, state, and local laws. For positions in Washington State, Maryland, or to be performed Remotely, click here or copy/paste the link below for paid time off benefits information. https://www.compass-usa.com/wp-content/uploads/2023/08/2023WageTransparencyEurest.pdf About Compass Group: Achieving leadership in the foodservice industry Compass Group is an equal opportunity employer. At Compass, we are committed to treating all Applicants and Associates fairly based on their abilities, achievements, and experience without regard to race, national origin, sex, age, disability, veteran status, sexual orientation, gender identity, or any other classification protected by law. Qualified candidates must be able to perform the essential functions of this position satisfactorily with or without a reasonable accommodation. Disclaimer: this job post is not necessarily an exhaustive list of all essential responsibilities, skills, tasks, or requirements associated with this position. While this is intended to be an accurate reflection of the position posted, the Company reserves the right to modify or change the essential functions of the job based on business necessity. Certain positions may require Florida Level 2 background screening. Details: https://info.flclearinghouse.com/ Applications are accepted on an ongoing basis. Eurest maintains a drug-free workplace. Req ID: 1564532 [[req_classification]]

Job Description • We are hiring immediately for full and part time BARISTA positions., • Location: Intel/RA4 Cafe - 2501 MW 229th, Cornelius, OR 97124 Note: online applications accepted only., • Schedule: Full time and part time schedules. Days may vary, 6:00 am -2:00 pm or 2:30 pm - 10:00 pm. More details upon interview., • Requirement: Barista experience required. *Internal Employee Referral Bonus Available • Pay Range: $17.50 per hour to $19.00 per hour We Make Applying Easy! Want to apply to this job via text messaging? Text JOB to 75000 and search requisition ID number 1561069. The advertised program is a conversational recruiting assistant that helps you apply to jobs with Compass Group. Message frequency varies. Message and data rates may apply. Text STOP to opt out or HELP for help. Terms and conditions: http://olivia.paradox.ai/moSkg Application Deadline: applications are accepted ongoing until all openings are filled for this position. If an applicant is declined due to the position being filled, they may still be considered for future opportunities and are always welcome to reapply. Diversity of thought and inclusion for all is what drives our success - we invite you to start your journey with us today! Eurest is recognized worldwide for standards of service and excellence within the foodservice industry. Embracing an ownership mindset, Eurest leverages global resources, promotes a local presence and enriches the communities we serve. The Eurest Promise, “connect with people, inspire through food, create solutions, and live our promise,” is exemplified throughout our organization. Eurest is proud to serve the world’s most respected successful corporations, including many of the Fortune 500. Job Summary Summary: Makes and serves coffee/espresso drinks and related food and beverage items. Handles food according to HACCP guidelines and standards for quality food-service operations. Interacts with customers and other employees in a friendly, courteous manner. Essential Duties and Responsibilities: • Prepares espresso orders for customers and catering using standard measures and recipes., • Enters orders accurately into POS device; accepts cash and charge payments., • Replenishes condiments, beverages and general supplies while maintaining cleanliness of service area., • Ensures proper presentation, portion control and maintenance of proper serving temperatures; follows HACCP standards., • Maintains sanitation and orderliness of all equipment, supplies and utensils., • Ensures proper food preparation by using approved recipes and following prescribed production standards., • Keeps display equipment clean and free of debris during meal service., • Cleans equipment and workstation thoroughly before leaving the area for other assignments., • Greets customers courteously and interacts in a manner to ensure customer satisfaction. Relays relevant concerns from customers to supervisors., • Serves customers quickly and efficiently, and prevents delays in serving lines., • Demonstrates a complete understanding of daily menu items and accurately explains them to customers., • Serves as an advocate of selling techniques to the customer by establishing good communication and assisting in the buying decision-making process., • Ensures all display foods are merchandised attractively per standards. Serves food neatly and attractively per standard., • Performs other duties as assigned. Associates at Eurest are offered many fantastic benefits. Full-time and part-time positions offer the following benefits to associates: Retirement Plan, Associate Shopping Program, Health and Wellness Programs, Discount Marketplace, Identity Theft Protection, Pet Insurance, Voluntary Benefits, including Critical Illness Insurance, Accident Insurance, Hospital Indemnity Insurance, Legal Services, and Choice Auto and Home Program Full-time positions also offer the following benefits to associates: Medical, Dental, Vision, Life Insurance/AD, Disability Insurance, Commuter Benefits, Employee Assistance Program, Flexible Spending Accounts (FSAs) Associates may also be eligible for paid and/or unpaid time off benefits in accordance with applicable federal, state, and local laws. For positions in Washington State, Maryland, or to be performed Remotely, click here or copy/paste the link below for paid time off benefits information. https://www.compass-usa.com/wp-content/uploads/2023/08/2023WageTransparencyEurest.pdf About Compass Group: Achieving leadership in the foodservice industry Compass Group is an equal opportunity employer. At Compass, we are committed to treating all Applicants and Associates fairly based on their abilities, achievements, and experience without regard to race, national origin, sex, age, disability, veteran status, sexual orientation, gender identity, or any other classification protected by law. Qualified candidates must be able to perform the essential functions of this position satisfactorily with or without a reasonable accommodation. Disclaimer: this job post is not necessarily an exhaustive list of all essential responsibilities, skills, tasks, or requirements associated with this position. While this is intended to be an accurate reflection of the position posted, the Company reserves the right to modify or change the essential functions of the job based on business necessity. Certain positions may require Florida Level 2 background screening. Details: https://info.flclearinghouse.com/ Applications are accepted on an ongoing basis. Eurest maintains a drug-free workplace. Req ID: 1561069 [[req_classification]]

Job Description HAZWOPER / Material Handler Location: Hillsboro, OR (Intel Campus) Pay: $23.00/hour Shift: 1st Shift Rotating Schedule (7:00 AM – 7:30 PM) Schedule Options: • Front Half Days: Sunday through every other Wednesday, • Back Half Days: Every other Wednesday through Saturday, • Rotating 36-hour and 48-hour workweeks Job Summary We are seeking reliable and safety-focused HAZWOPER/Material Handlers to support waste handling operations and environmental services at the Intel campus in Hillsboro, OR. This role is responsible for waste management activities, chemical onloads and offloads, preventative maintenance, inspections, rounds and readings, and maintaining compliance with environmental, health, and safety regulations. Ideal candidates will have experience working in industrial, environmental, chemical, or hazardous waste environments and demonstrate a strong commitment to workplace safety. Responsibilities • Follow all safety policies, procedures, and required PPE standards., • Report incidents, safety concerns, and participate in safety initiatives., • Conduct inspections and maintain accurate documentation and records., • Perform preventative maintenance on systems and equipment according to established procedures., • Complete chemical onloads and offloads safely and efficiently., • Conduct routine rounds and readings and document findings., • Follow work instructions, procedures, and customer requirements., • Ensure compliance with RCRA, DOT, OSHA, and company regulations., • Provide excellent customer service and technical support as needed., • Support waste handling, transportation, and material management activities., • Perform additional duties as assigned. Qualifications • High school diploma or equivalent required., • Previous waste handling experience preferred., • Science-related degree and/or environmental experience preferred., • Knowledge of RCRA, DOT, and OSHA regulations preferred., • Customer service experience is a plus., • Current 40-Hour HAZWOPER Certification or annual refresher preferred., • OSHA training preferred., • Proficiency with Microsoft Office applications., • Strong attention to detail and commitment to safety. Physical Requirements • Ability to lift up to 30 pounds regularly., • Must be able to wear a respirator and successfully pass respirator fit testing., • Ability to stand and walk for extended periods., • Ability to handle and move 55-gallon drums safely., • Must pass a company physical examination and drug screening.\nCompany Description SkySource Solutions believes in attaining success. We know success is important to our clients, applicants, candidates, and our internal staff and want to be an integral part of that process. The SkySource Difference: We are not just another staffing firm! We truly care about our candidates long-term success and how we get there together. So the BIG Question is... How do we get there? Our team of Recruiters come with 5 plus years of industry experience and are not looking to just find you a job. We truly care about your short-term and long-term career goals and understand what's important in making that next career move. We want to understand what you are looking for from a cultural, compensation and benefits perspective. Apply today and experience the SkySource difference! SkySource Solutions believes in attaining success. We know success is important to our clients, applicants, candidates, and our internal staff and want to be an integral part of that process.\r\nThe SkySource Difference: We are not just another staffing firm! We truly care about our candidates long-term success and how we get there together. So the BIG Question is... How do we get there?\r\nOur team of Recruiters come with 5 plus years of industry experience and are not looking to just find you a job. We truly care about your short-term and long-term career goals and understand what's important in making that next career move. We want to understand what you are looking for from a cultural, compensation and benefits perspective. \r\n\r\nApply today and experience the SkySource difference!

Job Description Job Title: Technician: Platform / Validation - III Location: (Hillsboro, OR) Duration: Contract - 18 months Pay Range: $30/hr $33/hr (W2) Job ID: 409036 About BCforward BCforward is a leading global IT consulting and workforce solutions firm providing services and support to Fortune 500 and government clients. Founded in 1998, BCforward has grown with our customers needs into a full-service business solutions provider. With delivery centers and offices across North America and India, we take pride in building long-term relationships and delivering excellence through innovation, collaboration, and integrity. Job Description We are seeking a Technician: Platform / Validation - III to join our onsite team. The ideal candidate will have strong experience in PC and server hardware assembly and debugging, Linux installation and administration, and high-speed networking and a proven ability to execute rack buildouts, maintain lab infrastructure, and resolve connectivity issues for remote users. Responsibilities: • Build and configure server systems, including installing cards and components., • Execute wiring changes and install servers within data center racks., • Install, update, and maintain Linux operating systems on lab and production hosts., • Debug PC hardware platforms and validate platform functionality., • Support remote users and troubleshoot connectivity and access issues., • Follow technical directions and standard operating procedures accurately. Required Skills & Qualifications: • 5+ years installing, running, and administering Linux operating systems., • Hands-on experience building and debugging PC and server hardware platforms., • Working knowledge of high-speed networking and rack-level cabling., • Ability to support remote users and resolve connectivity issues., • Good verbal and written communication skills., • High school diploma or GED equivalent required for US candidates., • At least 5 years of related work experience. Preferred Skills: • Familiarity with lab environments and VM administration., • Knowledge of Intel inventory system (ISMP) and Intel shipping system (ISM). Why BCforward? At BCforward, we believe in advancing lives and careers. When you join our team, you gain access to: • Competitive compensation and benefits., • Opportunities for growth with global clients., • A supportive, inclusive culture that values innovation and people., • Exposure to cutting-edge technologies and projects. Work Conditions 100% onsite. Sponsor is flexible with start and end times. Standard shift is Monday through Friday, 8am to 5pm. Laptop will be issued. Project Details Project ID: 100000. Hours per day: 8. Labor type: Technical. Maximum submissions per supplier: 5. Attachments: Cooper Frank_Resume.docx. About Our Commitment BCforward is an equal opportunity employer. We value diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, gender identity, national origin, age, disability, or veteran status. Interested? Apply Now! If this sounds like the right opportunity for you, please apply with your most recent resume.

Job Description Job description: Location: Hillsboro, OR (Intel Campus) Pay: $23.00/hour Shift: 3rd Shift Rotating Schedule (7:00 PM – 7:30 AM) Schedule Options: • Front Half Nights: Every other Saturday through Tuesday, • Back Half Nights: Wednesday through every other Saturday, • Rotating 36-hour and 48-hour workweeks Job Summary We are seeking reliable and safety-focused HAZWOPER/Material Handlers to support waste handling operations and environmental services at the Intel campus in Hillsboro, OR. This role is responsible for waste management activities, chemical onloads and offloads, preventative maintenance, inspections, rounds and readings, and maintaining compliance with environmental, health, and safety regulations. Ideal candidates will have experience working in industrial, environmental, chemical, or hazardous waste environments and demonstrate a strong commitment to workplace safety. Responsibilities • Follow all safety policies, procedures, and required PPE standards., • Report incidents, safety concerns, and participate in safety initiatives., • Conduct inspections and maintain accurate documentation and records., • Perform preventative maintenance on systems and equipment according to established procedures., • Complete chemical onloads and offloads safely and efficiently., • Conduct routine rounds and readings and document findings., • Follow work instructions, procedures, and customer requirements., • Ensure compliance with RCRA, DOT, OSHA, and company regulations., • Provide excellent customer service and technical support as needed., • Support waste handling, transportation, and material management activities., • Perform additional duties as assigned. Qualifications • High school diploma or equivalent required., • Previous waste handling experience preferred., • Science-related degree and/or environmental experience preferred., • Knowledge of RCRA, DOT, and OSHA regulations preferred., • Customer service experience is a plus., • Current 40-Hour HAZWOPER Certification or annual refresher preferred., • OSHA training preferred., • Proficiency with Microsoft Office applications., • Strong attention to detail and commitment to safety. Physical Requirements • Ability to lift up to 30 pounds regularly., • Must be able to wear a respirator and successfully pass respirator fit testing., • Ability to stand and walk for extended periods., • Ability to handle and move 55-gallon drums safely., • Must pass a company physical examination and drug screening.\nCompany Description SkySource Solutions believes in attaining success. We know success is important to our clients, applicants, candidates, and our internal staff and want to be an integral part of that process. The SkySource Difference: We are not just another staffing firm! We truly care about our candidates long-term success and how we get there together. So the BIG Question is... How do we get there? Our team of Recruiters come with 5 plus years of industry experience and are not looking to just find you a job. We truly care about your short-term and long-term career goals and understand what's important in making that next career move. We want to understand what you are looking for from a cultural, compensation and benefits perspective. Apply today and experience the SkySource difference! SkySource Solutions believes in attaining success. We know success is important to our clients, applicants, candidates, and our internal staff and want to be an integral part of that process.\r\nThe SkySource Difference: We are not just another staffing firm! We truly care about our candidates long-term success and how we get there together. So the BIG Question is... How do we get there?\r\nOur team of Recruiters come with 5 plus years of industry experience and are not looking to just find you a job. We truly care about your short-term and long-term career goals and understand what's important in making that next career move. We want to understand what you are looking for from a cultural, compensation and benefits perspective. \r\n\r\nApply today and experience the SkySource difference!

Your role \n The On-site Service Engineer Team Lead is responsible for performing and supervising semi-routine preventative maintenance of products through well-defined schedules and procedures. \n \n Main Responsibilities: \n • Directs team daily operational activities while providing single point of contact for customer for all Installation Qualification related issues. \n • Establishes and audits local operating procedures to provide a training aid and reference source for Edwards and customer personnel. \n • Performs special projects at customer site with supervision as needed from senior technical experts or project management. \n • Maintains records of repairs and maintenance performed using local database. Develops and maintains a preventive maintenance schedule for equipment that will ensure optimum performance. \n • Assists with failure analysis by providing information on mode of failure on each equipment failure. \n • Submits information to Edwards technical department to drive equipment improvements. \n • Writes weekly/monthly reports on activities that have been performed at a customer’s site based on customer and regional management requirements. \n • Works with Site Lead and Site Manager to ensure 7x24 escalation support for site team. \n • Maintains punctual, regular and predictable attendance; works collaboratively in a team environment with a spirit of cooperation. \n • Respectfully takes direction from supervisor and completes other duties as assigned. \n \n \n To succeed, you will need \n Education level \n • AS degree or equivalent in relevant technical field (full military equivalent may substitute for AS with HR and supervisory approval) OR 4+ years' related technical experience (i.e., military, electromechanical devices, comms). \n \n Relevant Previous experience \n • 5 years related industry experience including the completion of relevant training and competencies profiles defined within the training plan for the current position and has demonstrated understanding of the product. \n \n Knowledge areas/Skills \n • Electronic, mechanical, chemical, or gas in the Semiconductor industry is preferred. \n \n Other requirements \n • Strong proven leadership skills. \n • Excellent organization, prioritizing, multi-tasking and customer service skills. \n \n \n In return, we offer \n\n • Culture of trust and accountability\n, • Lifelong learning and career growth\n, • Innovation powered by people\n, • Comprehensive compensation and benefits\n, • Health and well-being\n\n \n Job location \n This position is onsite, supporting our valued customers at Intel! \n \n #UVL \n \n \n We Are An Equal Opportunity Employer! \n Edwards Company considers for employment and hires qualified candidates without regard to race, religion, color, sex, sexual orientation, genetic information, gender, gender identity, gender expression, age, national origin, ancestry, citizenship, protected veteran or disability status or any factor prohibited by law, and as such affirms in policy and practice to support and promote the concept of equal employment opportunity and affirmative action, in accordance with all applicable federal, state, provincial and municipal laws. \n \n No person shall be denied the equal protection of the laws of this state or any subdivision thereof. No person shall, because of race, color, ethnicity, national origin, age, disability, creed [or], religion, or sex, including sexual orientation, gender identity, gender expression, pregnancy, pregnancy outcomes, and reproductive healthcare and autonomy, be subjected to any discrimination in [his or her] their civil rights by any other person or by any firm, corporation, or institution, or by the state or any agency or subdivision of the state, pursuant to law. \n \n Edwards is a global leader of vacuum and abatement systems. We are proud to lead the industry, pushing the boundaries of science to deliver innovative products which are intrinsic to everyday life, working in partnership with our customers and continually setting new standards. With over 150 years of rich heritage, Edwards is the partner of choice for tens of thousands of customers in critical applications around the world. Vacuum is required in diverse sectors, from the generation of power to the production of steel, to the challenging environments of space simulation and high energy physics research. \n \n At Edwards, we believe there is always a better way. Our employees are full of ideas. When looking to add a new team member, we are looking for someone that can appreciate what the Edwards Team has done and bring their new ideas and perspective to enhance where we can go. At Edwards you get to be part of something big; we work globally, but also get the opportunity make a difference locally in our own discipline. We work hard to attract, motivate, develop and retain the best talent from the diversity of people across the globe. Our vision to be First in Mind, First in Choice relies on this strategy. We are an Equal Opportunity Employer. \n \n For more information about Edwards visit our website: www.edwardsvacuum.com \n A division of Atlas Copco

Job Title: Material Handler Location: Hillsboro, OR Position Type: Full-Time Pay Rate: $18/hr - $18.50/hr. Shifts: 12 hour shifts - Days and Nights Job Description: We are seeking motivated Material Handlers to join our team. You will be responsible for performing functions associated with all material handling of boxes. Material Tech's scope includes operating material handling equipment in a ESD environment. Responsibilities include standard processing and minimal problem-solving, as well as actual processing of state-of-the-art device.You will be required to participate in safety expectations and culture. Assignments are routine and repetitive in nature with work performed in narrowly defined parameters. Limited judgment will be required to resolve standard problems as you will receive detailed instructions for all work. Training others with documented instruction may be required at a later time to support the business needs. Key Responsibilities: • Operating a golf cart and transporting boxes between different buildings, • Operating material handling equipment in a ESD environment, • A valid driver's license is required, • Adhere to all safety rules and regulations while working in the factory. Physical Requirements:, • Regularly lift loads up to 50 lbs., • Stand or sit for up to 9 hours within a shift., • Drive a golf cart, • Work on a compressed work week schedule with 12-hour shifts alternating between three and four days per week. Qualifications:, • High school diploma or equivalent (to be completed by employment start date)., • A valid drivers license Preferred Qualifications: • Higher education after High school, • Driving experience Additional Information:, • This position is entry-level, with compensation adjusted accordingly., • This position is not eligible for Intel immigration sponsorship. If this is a role that interests you and you’d like to learn more, click apply now and a recruiter will be in touch with you to discuss this great opportunity. We look forward to speaking with you! https://www.manpower.com/en/about-us About ManpowerGroup, Parent Company of: Manpower, Experis, Talent Solutions, and Jefferson Wells ManpowerGroup® (NYSE: MAN), the leading global workforce solutions company, helps organizations transform in a fast-changing world of work by sourcing, assessing, developing, and managing the talent that enables them to win. We develop innovative solutions for hundreds of thousands of organizations every year, providing them with skilled talent while finding meaningful, sustainable employment for millions of people across a wide range of industries and skills. Our expert family of brands – Manpower, Experis, Talent Solutions, and Jefferson Wells – creates substantial value for candidates and clients across more than 75 countries and territories and has done so for over 70 years. We are recognized consistently for our diversity - as a best place to work for Women, Inclusion, Equality and Disability and in 2022 ManpowerGroup was named one of the World's Most Ethical Companies for the 13th year - all confirming our position as the brand of choice for in-demand talent #LI-JH1

Job Description • We are hiring immediately for full time GRILL COOK positions., • Location: Intel RA4 Cafe - 2501 MW 229th M/S 408, Cornelius, OR 97124. Note: online applications accepted only., • Schedule: Full time schedule. Days may vary: 5:00 am to 1:00 pm, or 7:00 am to 3:00 pm. Further details upon interview., • Requirement: Previous 2 years of high volume kitchen experience required. *Internal Employee Referral Bonus Available • Pay Range: $19.00 per hour to $22.00 per hour. We Make Applying Easy! Want to apply to this job via text messaging? Text JOB to 75000 and search requisition ID number 1569665. The advertised program is a conversational recruiting assistant that helps you apply to jobs with Compass Group. Message frequency varies. Message and data rates may apply. Text STOP to opt out or HELP for help. Terms and conditions: http://olivia.paradox.ai/moSkg Application Deadline: applications are accepted ongoing until all openings are filled for this position. If an applicant is declined due to the position being filled, they may still be considered for future opportunities and are always welcome to reapply. Diversity of thought and inclusion for all is what drives our success - we invite you to start your journey with us today! Eurest is recognized worldwide for standards of service and excellence within the foodservice industry. Embracing an ownership mindset, Eurest leverages global resources, promotes a local presence and enriches the communities we serve. The Eurest Promise, “connect with people, inspire through food, create solutions, and live our promise,” is exemplified throughout our organization. Eurest is proud to serve the world’s most respected successful corporations, including many of the Fortune 500. Job Summary Summary: Prepares food and serves customers at the grill station in accordance with current applicable federal, state and corporate standards, guidelines and regulations to ensure high-quality food service is provided. Essential Duties and Responsibilities: • Takes orders from customer and prepares items requiring short preparation. Completes orders from steam tables and serves customers at multiple stations., • Serves customers in an efficient, friendly manner following established steps of service meeting outlined standards. Ensures food is at the correct temperature and is attractive and tasty. Tastes all prepared food items., • Uses established ticket-collection procedures during service. Responsible for records from area worked during service periods., • Uses approved recipes and production standards to ensure proper quality, serving temperatures and standard portion control., • Carries pans, kettles and trays of food to and from workstations, stove and refrigerator in accordance with established safety standards., • Stores foods in designated areas following standard wrapping, dating and food safety and rotation procedures., • Cleans, sanitizes and maintains all assigned work areas, equipment and utensils to ensure sanitation standards are met., • Resolves customer concerns and reports relevant information and concerns to supervisor., • Attends in-service and safety meetings., • Maintains good working relationships with coworkers, customers, administrators and managers., • Performs job safely while maintaining a clean, safe work environment., • Performs other duties as assigned. Associates at Eurest are offered many fantastic benefits. Full-time and part-time positions offer the following benefits to associates: Retirement Plan, Associate Shopping Program, Health and Wellness Programs, Discount Marketplace, Identity Theft Protection, Pet Insurance, Voluntary Benefits, including Critical Illness Insurance, Accident Insurance, Hospital Indemnity Insurance, Legal Services, and Choice Auto and Home Program Full-time positions also offer the following benefits to associates: Medical, Dental, Vision, Life Insurance/AD, Disability Insurance, Commuter Benefits, Employee Assistance Program, Flexible Spending Accounts (FSAs) Associates may also be eligible for paid and/or unpaid time off benefits in accordance with applicable federal, state, and local laws. For positions in Washington State, Maryland, or to be performed Remotely, click here or copy/paste the link below for paid time off benefits information. https://www.compass-usa.com/wp-content/uploads/2023/08/2023WageTransparencyEurest.pdf About Compass Group: Achieving leadership in the foodservice industry Compass Group is an equal opportunity employer. At Compass, we are committed to treating all Applicants and Associates fairly based on their abilities, achievements, and experience without regard to race, national origin, sex, age, disability, veteran status, sexual orientation, gender identity, or any other classification protected by law. Qualified candidates must be able to perform the essential functions of this position satisfactorily with or without a reasonable accommodation. Disclaimer: this job post is not necessarily an exhaustive list of all essential responsibilities, skills, tasks, or requirements associated with this position. While this is intended to be an accurate reflection of the position posted, the Company reserves the right to modify or change the essential functions of the job based on business necessity. Certain positions may require Florida Level 2 background screening. Details: https://info.flclearinghouse.com/ Applications are accepted on an ongoing basis. Eurest maintains a drug-free workplace. Req ID: 1569665 [[req_classification]]

Our Industrial Security team partners with employees, government agencies, and business stakeholders to safeguard classified information, facilities, technologies, and personnel while ensuring compliance with the National Industrial Security Program (NISP). As you develop your expertise, you'll have

The Install Qualification Operation Specialist is responsible for driving key milestones enabling tool installation, readiness, and qualification within Intel Foundry Construction and Sourcing (FCS). The role is responsible for equipment install exec Operations Specialist, Operations, Project Management, Maintenance Technician, Specialist, Construction, Technology

Job Details:Job Description: About the GroupIntel Foundry Quality, Reliability and Labs is focused on strengthening Intel Foundry’s long-term business success through quality, reliability, prevention systems, labs, and customer quality across wafer fabrication, advanced packaging, substrates, assembly, and test. The organization partners across manufacturing, technology development, automation, sourcing, engineering, labs, suppliers, and customer quality to reduce supplier-related risk, improve prevention, and drive sustained quality improvement. About the RoleIntel Foundry is seeking a strategic, results-oriented Senior Director to lead Supplier Quality and Reliability. Reporting to the VP/GM of Intel Foundry Quality, Reliability and Labs, this leader will define the vision and execute the strategy to eliminate supplier-related quality incidents across wafer fabrication, advanced packaging, substrates, assembly, and test. This leader will partner with high-impact Intel Foundry leaders across manufacturing, technology development, automation, sourcing, engineering, labs, customer quality, and suppliers to strengthen prevention, accountability, decision-making, and sustained improvement. The ideal candidate brings executive presence, supplier influence, and a record of improving quality across complex global supply chains. External foundry or semiconductor supplier quality leadership experience is preferred.This role requires periodic domestic and international travel. Responsibilities:Define and execute supplier quality and reliability strategy aligned with Intel Foundry roadmaps and customer commitments. Lead a global Supplier Quality and Reliability organization across equipment, materials, packaging, assembly, and test. Communicate supplier performance, risks, decisions, and mitigation plans to executives. Deploy qualification, audit, surveillance, release, and prevention systems across suppliers and sub-tier suppliers. Control supplier changes across materials, configurations, firmware/software, packaging, handling, and logistics. Partner across manufacturing, sourcing, engineering, labs, customer quality, and suppliers to align priorities and reduce risk. Define metrology and monitoring systems for equipment, incoming materials, and manufacturing process interactions. Drive containment, root cause, corrective action, recurrence prevention, and supplier accountability for major excursions. Direct engagement with supplier executives on a peer-to-peer basis for roadmap development and implementation and issue containment and resolutionExperience Required:Experience with semiconductor quality management systems, supplier qualification, audits, change control, corrective action, and risk reduction. Demonstrated ability to influence senior stakeholders and drive cross-functional alignment in complex technical environments. Leadership experience in supplier quality, reliability, manufacturing quality, or supply chain quality within semiconductor, foundry, advanced packaging, or high-tech manufacturing environments. Experience leading global teams, executive supplier engagements, and quality improvement programs across multi-tier supplier ecosystems. Strong business acumen with experience connecting technical execution to customer, financial, and operational outcomes. Qualifications:Bachelor’s degree in Engineering, Science, Business, or a related field required. Advanced degree such as an MBA, MS, or PhD preferred. 8+ years of experience in semiconductor manufacturing, technology development, supplier quality, reliability, or a related technical field. Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, PhoenixPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $213,650.00-301,620.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, Arizona, PhoenixType: Full time

Job Details:Job Description: About Us The Technology Development (TD) Quality and Reliability organization enables successful deployment of Intel's leading-edge process technologies through silicon-based quality, reliability, and technology readiness assessments. The Memory Quality and Reliability team partners with Design, Device Engineering, Product Development Engineering, and Yield organizations to develop, characterize and certify SRAM, Register File (RF), and Fuse array for advanced technology nodes. The team supports technology certification and PDK release milestones by establishing certification strategies, developing certification methodologies, performing silicon characterization, generating predictive Vccmin models, and assessing product risk for internal and external customers. Role Overview We are seeking an experienced Memory Quality and Reliability Engineer to drive post-silicon memory characterization, certification, and technology readiness activities for advanced SRAM, Register File (RF) and/or fuse array. In this role, you will help improving certification methodologies, analyzing large-scale silicon characterization data, developing Vccmin/Vmax predictive models, assessing silicon-to-simulation correlation (Sil2Sim), and providing risk assessments that guide technology development, product deployment, and PDK release decisions. You will work with design, device, process, test, and yield organizations to transform silicon learning into certification decisions and actionable technology improvements. Key Responsibilities • Plan and execute SRAM, RF, and/or Fuse technology certification supporting technology development and certification milestones. • Define and maintain certification methodologies and criteria, test strategies, and readiness requirements for memory array. • Drive memory array characterization across multiple operating conditions to evaluate Vmin, Vmax, aging behavior, variability, and design margins. • Analyze silicon characterization data to identify performance gaps, failure signatures, systematic trends, and technology risks. • Develop, validate, and maintain silicon-based Vccmin and Vmax predictive models used for technology certification, PDK releases, and product guidance. • Perform silicon-to-simulation (Sil2Sim) correlation assessments and drive understanding of discrepancies between measured silicon behavior and design predictions. • Collaborate with Yield, Design, Device Engineering, PDE, Defect Rel and FIFA teams to define root-cause hypotheses, resolution paths, and technology improvement recommendations on meeting technology commit for memory offers. • Generate certification reports, readiness assessments, and risk projections that support technology deployment decisions. • Present technical findings and recommendations to engineering leadership, program teams, and customers. • Drive continuous improvement of memory certification methodologies, modeling approaches, characterization flows, and data analytics infrastructure. • Provide technical mentorship and leadership within a highly collaborative cross-functional environment. Behavioral Traits • Demonstrated ability to influence across organizational boundaries and drive resolution of complex technical challenges. • Strong analytical and problem-solving skills with a data-driven decision-making approach. • Ability to work effectively in ambiguous, fast-paced technology development environments. • Excellent written and verbal communication skills, including presentation of complex technical topics to diverse stakeholders. • Self-motivated and capable of independently driving technical programs from problem definition through closure.Qualifications:QualificationsMinimum Qualifications• Ph.D. in Electrical Engineering, Computer Engineering, Physics or related discipline with 2+ years of semiconductor industry experience OR M.S. in Electrical Engineering, Computer Engineering, Physics, Materials Science, or related discipline with 6+ years of semiconductor industry experience.• 2+ years of hands-on experience with memory testing.• 2+ years of experience performing quantitative analysis of large-scale memory or semiconductor datasets using statistical methods such as DOE, SPC, regression analysis, hypothesis testing, or multivariate analysis.• 2+ years of hands-on experience using JMP and Python for data analysis, statistical modeling, process optimization, automation, or data visualization.Preferred Qualifications• Experience in memory design, characterization, validation, modeling, product development, quality, reliability, or technology development.• Strong understanding of SRAM and/or Register File design fundamentals, silicon characterization techniques, and variability analysis.• Experience developing silicon-based predictive models, statistical distributions, guardbands, and product risk projections.• Knowledge of Vmin/Vmax characterization methodologies, memory margin assessment, array screening techniques, or design technology co-optimization.• Experience with silicon-to-simulation correlation (Sil2Sim), SPICE modeling, or design validation.• Familiarity with technology certification, PDK development, or product deployment processes.• Programming experience in Python, JSL, SQL, or data analytics frameworks.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, FolsomAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $155,520.00-219,550.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, California, Folsom; US, California, Santa Clara; US, Oregon, HillsboroType: Full time

Job Details:Job Description: Intel is transforming from an Integrated Device Manufacturer (IDM) to a leading foundry service provider, offering world-class manufacturing capabilities to customers worldwide. Our Manufacturing Development and Customer Engineering (MDCE) organization is at the forefront of this transformation, focusing on yield improvement, performance optimization, and exceptional customer service delivery.We are seeking a Principal Collateral Device Engineer to join our team within MDCE. This role requires regular onsite presence to fulfill essential job responsibilities and will creates next generation device and interconnect technology by ensuring the process device performance for developing processes is world class, using deep understanding of device physics.Key Responsibilities:Demonstrated expertise in leading cross functional group in defining derivative architectures including Design rules, transistors and interconnects. Expertise in CMOS semiconductor device physics and test chip design for advanced transistor device architecture.Experience in scribe line layout design and process monitoring structure development.Proficiency in design rule development, validation, and waiver management processes.Strong understanding of DTCO skills Including understanding of SRAM, Standard cells and be the key interface and bridge between Process Integration , Yield, Device and Design.Strong skills in data analysis, scripting, and statistical techniques for test chip data interpretation.Excellent technical problem-solving skills with ability to balance design rule compliance with customer flexibility needs.Ability to work collaboratively in globally diverse, cross-disciplinary teams to develop innovative device collateral solutions.Demonstrated experience with design of experiment (DOE) principles applied to device collateral optimization.Proven track record of delivering device collateral solutions in a fast-paced manufacturing environment.Desire to learn, lead, and influence cross-functional teams in collateral development and design rule optimization.Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:Master’s degree in Electrical Engineering, Physics, or related field15+ years of experience in CMOS device engineering with focus on test chip design and device collateral developmentPreferred Qualifications:Ph.D. degree in Electrical Engineering, Physics, or related field15+ years of experience in CMOS device engineering and collateral developmentHands-on experience in advanced node test chip design and scribe line optimization for 3nm-16nm FinFETs and sub 3nm GAA FETsExperience with design rule checker (DRC) development and physical verification flowsExperience in High-Volume Manufacturing environment with focus on yield monitoring and process control structuresKnowledge of statistical process control (SPC) and advanced data analytics for device collateral optimizationKnowledge of mask generation including Boolean/OPC .Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Arizona, Phoenix, US, Oregon, HillsboroBusiness group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $224,970.00-317,600.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, California, Santa Clara; US, Arizona, Phoenix; US, Oregon, HillsboroType: Full time

Job Details:Job Description: Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below. Life at IntelPosition Summary: The Semiconductor Packaging Research Engineer drives technology research for advanced packaging and heterogeneous integration. The role is suited for candidates with expertise in either packaging process integration or modeling/simulation, with a focus on evaluating new architectures, materials, interconnects, reliability risks, and manufacturability trade-offs for future products. Key Responsibilities Research advanced packaging concepts such as chiplets, heterogeneous integration, 2.5D/3DIC, hybrid bonding, interposer, and die-to-die interconnects. Drive either process integration learning or modeling/simulation to assess feasibility, reliability, manufacturability, and technology readiness. For process integration: define integration flows, research vehicles, DOE, defect/yield learning, qualification evidence, and risk mitigation paths. For modeling: develop and validate thermal, thermo-mechanical, electrical, reliability, or multi-physics models using experimental and failure analysis data. Translate product needs into research hypotheses, technical plans, and recommendations; document outputs through reports, design guidance, IP, publications, and development-transfer inputs. Collaborate across research, design, process, materials, reliability, manufacturing, supplier, university, and ecosystem teams. For information on Intel’s immigration sponsorship guidelines, please seeIntel U.S. Immigration Sponsorship InformationQualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Required Qualifications Master’s or Ph.D. in Mechanical Engineering, Electrical Engineering, Materials Science, Applied Physics, Computational Mechanics, Microelectronics, Semiconductor Manufacturing, or related field. 1+ years’ experience in semiconductor packaging research, advanced packaging integration, process integration, modeling/simulation, reliability, materials, or heterogeneous integration. 1+ years' experience in one or more of the following areas: process integration, research vehicle execution, DOE, defect/yield learning, reliability, model development& validation, or multi-physics simulation. 1+ years' experience with advanced packaging technologies such as flip chip, chiplets, 2.5D/3DIC, fan-out, hybrid bonding, interposers, HBM integration, advanced substrates, or die-to-die interconnects. Preferred Qualifications Ph.D. or deep technical specialization in packaging process integration, computational mechanics, thermal sciences, electrical modeling, materials reliability, or microelectronics research and 4+ years of relevant experience. Experience with prototype builds, technology readiness assessment, research-to-development transfer, package-system co-optimization, or chip-package-board co-design. Modeling tool experience such as ANSYS, Abaqus, COMSOL, HFSS, Cadence, MATLAB, Python, JMP, or equivalent platforms. Record of patents, publications, conference presentations, technical reports, methodology development, or competitive technology assessments. Ability to turn ambiguous research problems into clear assumptions, experiments, learning milestones, qualification metrics, and actionable recommendations. Key Competencies Advanced packaging research and pathfinding Process integration or modeling/simulation expertise Heterogeneous integration, chiplet, and advanced substrate knowledge DOE, prototype learning, reliability assessment, or model validation Technology readiness evaluation and cross-functional communication Success Measures Research outputs identify credible integration options, technology limiters, and trade-offs for future platforms. Process integration or modeling results are supported by clear assumptions, evidence, validation data, and documented limitations. Prototype, DOE, or simulation learning improves feasibility, reliability, integration robustness, and manufacturability understanding. Key risks are identified early with practical mitigation paths and development-transfer recommendations. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.Benefits at IntelOur total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.Job Type:College GradShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Arizona, Phoenix; US, Oregon, HillsboroType: Full time

Job Details:Job Description: Intel's Brand and Creative team, within the Global Marketing and Communications Group, is seeking a Data Center and AI (DCAI) Brand Strategist to lead the strategic development of Intel's data center, AI infrastructure, and enterprise brands. This role will shape Intel's brand portfolio across CPUs, GPUs, AI accelerators, networking, and software, ensuring alignment with business goals and enterprise, cloud, and developer engagement strategies.Responsibilities Include, but are not limited to:Brand Strategy Development: Lead the creation, curation, and management of Intel's data center and AI product brand strategy across hardware and software that spans multiple types of workloads.Naming and Architecture: Define and implement strategic decisions regarding product brand creation, brand extensions, hierarchy, categories, and segmentation across silicon, systems, and software tiers - ensuring the architecture reflects real technical distinctions. Oversee the development of naming conventions, nomenclature, and tiering strategies for a technically nuanced portfolio, ensuring names are credible to technical buyers while remaining clear to business decision-makers.Cross-functional and Technical Collaboration: Partner with silicon architects, hardware and software engineers, product marketing, and designers to ensure branding strategies accurately reflect the underlying technologyStakeholder Management: Effectively manage senior stakeholders across business units, engineering, sales, and marketing teams - including Data Center and AI Group leadership - to drive alignment on long-term brand decisions for a fast-moving, competitive category.Brand Activation and Visual Identity: Collaborate on the development of physical and digital brand activations ensuring consistent and impactful brand storytelling for enterprise, cloud, and developer audiences.Brand Analysis and Insights: Work with internal and external teams to validate brand strategy frameworks, measure impact with audiences, benchmark against competitive brands, and refine ongoing brand management practices.Agency and Vendor Management: Direct internal and external brand and naming resources to support branding initiatives when necessary. Identify and implement efficiencies in workflows across the portfolio.A Successful Candidate Will Demonstrate:Deep expertise in brand strategy, naming, and architecture, applied to complex, technical B2B product portfolios.Working technical fluency in data center and AI infrastructure - a clear understanding of how CPUs, GPUs, and AI accelerators differ and complement each other, how heterogeneous compute systems are architected, and how software (frameworks, compilers, runtime libraries, and orchestration tools) enables portability and performance across training, fine-tuning, and inference workloads.Willingness and ability to drive strategic thinking for evolving product categories as AI infrastructure and workloads.Passion for enterprise, cloud, and developer-facing products and technical audience engagement.Proven skills to influence creative strategy and visual identity systems for technically sophisticated products.Experience in cross-functional collaboration with silicon engineers, systems architects, and software teams as well as marketing and design.A track record of driving data-driven brand decision-making.Experience guiding executive-level stakeholders and fostering business alignment in a competitive, fast-moving market.Exceptional project management skills to oversee branding initiatives across silicon, systems, and software workstreams.Strong presentation skills for executive-level and technical-audience communication.Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.This position is not eligible for Intel Immigration sponsorship.Minimum Qualifications:6+ years of experience in brand strategy, brand management, brand marketing, product marketing, or brand naming at either a brand agency or on the client side.3+ years of experience presenting to executive stakeholders.3+ years of experience in technology branding, ideally including data center, semiconductor, cloud infrastructure, or enterprise IT categories.Demonstrated understanding of core data center and AI hardware/software concepts (CPUs, GPUs, AI accelerators, memory/interconnect fundamentals, and AI software stacks) sufficient to partner credibly with engineering and technical product teams.Preferred QualificationsBachelor's degree in business, marketing, or a related field; technical degree or coursework (computer engineering, computer science) is a plus.2+ years of experience in data center, cloud, semiconductor, or enterprise/B2B technology brand projects.Familiarity with AI infrastructure concepts such as training vs. inference, model serving, heterogeneous computing, and open software ecosystems8+ years of experience in brand strategy, brand management, brand marketing, product marketing, or brand naming at either a brand agency or on the client side.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro, US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $145,850.00-247,930.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, California, Santa Clara; US, Oregon, Hillsboro; US, California, Folsom; US, Texas, Austin; US, Arizona, PhoenixType: Full time

Job Details:Job Description: Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone.Life at IntelWe developed the Intel E-Core microprocessors, a foundational technology that powers a diverse range of devices-from entry-level PCs to high-end gaming desktops and laptops, as well as data center solutions and many other applications. As part of our team, you will help design the next generation of high-performance microprocessors. We are looking for a skilled individual who has hands-on experience in RTL methodologies, coding, debug and effective use of AI tools and can provide technical leadership to deliver world-class products.As a Sr. CPU RTL Methodology Engineer your responsibilities will include but are not limited to:Demonstrated leadership and hands-on experience in leveraging AI tools and methodologies to drive significant efficiency gains and improvements in RTL coding and other areas of silicon development.Proactively advances front-end methodologies and contributes to architectural and microarchitectural discussions to enhance scalability and flexibility.Develops and implements strategies, tools, and techniques for RTL development and logic optimization, ensuring designs meet power, performance, area, and timing targets, as well as physical design integrity.Possesses a comprehensive understanding of both front-end and back-end flows, with a proven track record of delivering solutions across multiple domains.Collaborates effectively with architecture, backend, and other design teams to deliver industry-leading products.Builds and sustains a high-performing, technically strong organization by fostering and upholding core group values, norms, and behaviors.Behavioral traits that we are looking for:Excellent in problem-solving, analytical skills.Excellent written and verbal communication skillsAbility to work effectively in a fast-paced environment and collaborative environmentQualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:Education Requirement:• Bachelor's degree in Computer Science, Electrical, Electronics, Engineering, or related field with 8+ years of work experience OR• Master's degree in Computer Science, Electrical, Electronics, Engineering, or related field with 7+ years of work experience OR• PhD in Computer Science, Electrical, Electronics, Engineering, or related field with 4+ years of work experience.Minimum Required Qualifications:• 6+ years of experience in silicon development of CPU logic.• 5+ years of experience in technical leadership and in delivering successful IP ProjectsAdditional Preferred Qualifications:• Experience on x86 CPU microarchitecture• Experience with x86 memory management execution• Experience with driving front end methodologies and championing the use of AI tools to realize tangible benefits visible at the product level.Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.Benefits at IntelOur total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:US, Arizona, Phoenix, US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $164,470.00-311,890.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Texas, Austin; US, Arizona, Phoenix; US, Oregon, HillsboroType: Full time

Job Details:Job Description: The Role and ImpactJoin Intel's Advanced Design Foundational IP Organization (AD-FIP) within the Design Technology Platform (DTP), a team that is pivotal in shaping the future of analog and mixed-signal IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and developing cutting-edge analog circuits in advanced process nodes. Your work will directly impact Intel's ability to deliver the best-in-class foundational IP and product designs that drive innovation across client, server, and networking technologies. Collaborating with cross-functional teams, you will play a critical role in optimizing performance, power, area, and yield of circuits while pushing the boundaries of what is possible in semiconductor technology.Key Responsibilities- Design, develop, and implement analog circuits and mixed-signal IPs, including ADCs, DACs, voltage regulators, and high-speed I/O interfaces.- Perform circuit-level design, simulation, and optimization to meet power, performance, area, timing, and yield requirements.- Create and validate floorplans, extract chip parameters, and simulate analog behavior models to ensure robust designs.- Develop test plans for design verification and evaluate test results to meet specification requirements.- Collaborate with architecture and layout teams to design circuits that maximize functionality, robustness, and electrical capabilities.- Conduct tape-out activities for analog and mixed-signal circuits, ensuring successful silicon implementation.- Analyze and resolve performance and circuit-related issues during design and post-silicon validation phases.- Serve as a technical interface to process technology, IP engineers, and product teams, leveraging design insights to influence future process node development.Qualifications:Minimum Qualifications- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field and 4+ years of experience in analog and mixed-signal circuit design; or Master's degree with 3+ years of experience; or PhD with 1+ years of experience.- Expertise in analog circuit design, simulation, and verification.- Proficiency in CMOS technologies and layout understanding for analog circuits.- Experience with tape-out processes for analog mixed-signal circuits, including ADCs and DACs.- Knowledge of SoC analog layout design checks and methodologies.Preferred Qualifications- Advanced knowledge of high-speed parallel or serial I/O links, clock distribution, or voltage regulator design.- Experience with PLLs, bandgap references, inductors, transmission lines, and RF or millimeter-wave circuits.- Strong understanding of power delivery networks (PDN) and integrated power regulators.- Proven ability to collaborate across teams and influence decisions related to process technology and product development.Come be a part of Intel's mission to shape the future of technology. Apply today to join a team where innovation, collaboration, and excellence drive the creation of transformative products.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, California, Santa Clara; US, Texas, Austin; US, Arizona, PhoenixType: Full time

Job Details:Job Description: Join Intel's dynamic team as a Manufacturing Engineer, where you will play a pivotal role in driving innovation, efficiency, and excellence across Intel's advanced manufacturing operations. In this critical position, you will bridge the gap between product design and high-volume manufacturing while ensuring the reliability, quality, and cost-effectiveness of Intel's cutting-edge technologies. Your work will directly influence factory performance, product quality, and manufacturing capabilities, contributing to Intel's position as a global leader in semiconductor technology. By collaborating with cross-functional teams, optimizing manufacturing processes, and implementing strategic improvements, you will make a significant impact on Intel's manufacturing excellence and help deliver industry-leading solutions to customers worldwide.Key Responsibilities may include but not limited to :• Develop and implement manufacturing processes, requirements, and technologies to support high-volume production• Collaborate with cross-functional teams including product engineers, design teams, and manufacturing operations to align strategies and requirements• Optimize and sustain manufacturing processes throughout the product lifecycle to improve efficiency and performance• Partner with high-volume manufacturing sites to transfer processes and resolve manufacturing-related challenges• Provide technical expertise and solutions for manufacturing issues, ensuring seamless execution and quality standards• Drive continuous improvement initiatives to enhance equipment performance, reduce costs, and meet new performance benchmarks• Develop comprehensive documentation of manufacturing processes, procedures, and best practices• Lead engineering projects including defining requirements, managing timelines, and conducting post-implementation reviews• Analyze manufacturing metrics and data to identify improvement opportunities and drive factory performance enhancementsAnnual Salary Range for jobs to be performed in Hillsboro, OR: $140,393 - $170,630 USDThis position requires work at the Intel site at least 4 days per week in accordance with company policy.Qualifications:PhD Degree or foreign equivalent in Electrical/Electronic Engineering, &/or Computer Engineering, or Science, or other STEM-related degree.Job Type:Shift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. The range displayed on this job posting reflects the minimum and maximum target compensation for this position. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.Work Model for this RoleThis role will require an on-site presence.*ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, HillsboroType: Full time

Job Details:Job Description: Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life.This role is within Intel's Client Computing Group. CCG is a computing paradigm where services and data reside in scalable data centers, and those services and data can be accessed by any connected device over the Internet.The group is responsible for designing and optimizing processors, chipsets, and other hardware for consumer devices, while also working on the software ecosystem—including drivers and utilities that enhance user experience.Intel is seeking a highly motivated and experienced Post-Silicon Validation Engineer to join the team and play a critical role in ensuring the quality and functionality of cutting-edge CPU products for laptops, desktops, and gaming systems.You will work at the heart of innovation, contributing to the validation of complex CPU/SOC architectures and ensuring products meet the highest standards of reliability and performance.Key Responsibilities (Include, but are not limited to):Develop and execute validation plans to verify CPU/SOC functionality, power, and thermal management across multiple silicon platformsDesign, implement, and debug validation tests and methodologies for post-silicon environmentsCollaborate with cross-functional teams, including design, firmware, software, and manufacturing, to identify and resolve issuesAnalyze and debug CPU/SOC and system-level issues using advanced tools and methodologiesLead debug task forces to root-cause and resolve issues impacting program milestonesDrive validation automation, coverage improvement, and process efficiency for validation executionWork with internal stakeholders to ensure smooth integration and delivery of products to the marketRequired AttributesThe Post-Silicon Validation and Debug Engineer should possess the following attributes:Written and verbal communication skillsWillingness to prioritize multiple projects and work independentlyWillingness to work effectively in a collaborative, cross-functional environmentExcellent problem-solving and debugging skillsBenefits at IntelOur total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits ' Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum QualificationsBachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science or related field. 2+ years of hands-on experience inPost-silicon validation, pre-silicon verification or Design, particularly in CPU, SOC, or chipset domains.Technology such as SOC and CPU architecture, microarchitecture, and Power Management flows. 1+ years of experience with Silicon validation tools, lab equipment (e.g., logic analyzers, oscilloscopes), and debugging techniques.Scripting and programming languages (e.g., Python, C/C++, or Perl) to develop validation tools and frameworks.Preferred Qualifications2+ years of experience with Graphics, Media, Display IPs architecture, microarchitecture, and Power Management flows. Candidates with advanced degrees and 5+ years' experience encouraged to apply. Familiarity with power and performance testing methodologies is a plus.Experience with Intel architecture, silicon bring-up, and validation flow.Knowledge of firmware and software interaction with hardware.Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, California, FolsomPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, California, FolsomType: Full time

Job Details:Job Description: Join Intel’s Silicon Photonics Q&R (SiPh) team that is in transformation and in its growing phase now, working to enable our internal leading edge SiPh photonics technology with integrated hybrid lasers and SOAs to our Intel Foundry customers. This is a unique opportunity to be part of the team that has propelled Intel to become a widely recognized leader in high-volume silicon photonics manufacturing and reliability! As a Senior Silicon Photonics (SiPh) Technology Development Quality and Reliability Engineer (Sr. SiPh TD QRE), you will be part of the Photonic TD team. Working both on path-finding photonic technologies and devices for the future and on current nodes of our photonic processes. Your new team, (SiPh TD QnR), is at the forefront of silicon photonics technology development, working closely and collaborating with the SiPh fab process integration, Integrated Photonics Solutions (IPS) R&D design team, Foundry Q&R teams and other organizations to ensure reliability for internal and external SiPh device technologies, process certification, and product qualifications. Responsibilities may include but not be limited to:Assess intrinsic and extrinsic reliability of photonic devices and photonic ICs post fabrication and in integrated products form-factors. Work on process changes to optimize reliability. Conduct DOEs to develop reliability models of the devices. Develop new reliability characterization and acceleration techniques, analytical tools, and quality screens as required. Determine requirements for both process certification and product qualification purposes. Collaborate cross-functional teams to drive the quality and reliability aspects of the SiPh technology development following Intel’s Development Life Cycle methodology. Determine root causes/mechanisms of failures when encountered from reliability testing activities or customer returns as needed. Review white papers and provide appropriate actions related to quality and reliability area. Ensure smooth transition from development phase to HVM phase with proper quality systems, engineering shipment management, fab excursion support, and process change support. The ideal candidate should exhibit the following behavioral traits: Excellent communication skills (both verbal and written). Strong networking, teamwork, and social skills. Ability to work in a diverse and multi-cultural team environment. Work under pressure, and in an ever-changing and dynamic environment. Push forward multiple parallel efforts (multi-tasking) in a constrained environment. Strong problem-solving skills. Curious, eager, proactive, and quick to learn. An independent thinker who can drive and develop solutions and implement them. In addition to the qualifications described below, a successful candidate will demonstrate: Usage of failure mode effects analyses and model-based problem-solving approaches. Knowledge of statistics and data analysis, including the advanced use of tools such as Excel, SAS and JMP. Specifically on advanced statistics and large data sets analysis tools and applications. Skills to deliver concise key messages for senior management review. Influencing cross-functional teams to achieve extraordinary results. Strong execution experience and commitment. Passionate about quality and reliability as it relates to developing new technologies. Qualifications:QualificationsMinimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Education Requirement:PhD graduates with outstanding work in Photonics are encouraged to apply! OR- master's in engineering or related field and with 4+ year experience in photonic devices. Minimum Qualifications: 2+ years of proven experience in Photonics devices development at a leading foundry OR 4+ year photonics experience from an academic institution. OR 4+ year hands-on compound semiconductor processing experience with deep knowledge of Photonic device physics. OR 4+ years of relevant engineering experience in Photonics with device characterization, yield, reliability, or test/validation experience. Preferred Qualifications:PhD in Physics, Materials Science, Electrical Engineering, or related engineering fields with 2+ years of experience in photonic devices. 4+ years’ experience in process certification/product qualification and reliability risk assessment, quality systems, and quality culture knowledge. Semiconductor device physics and defect mechanism knowledge. Knowledge of semiconductor manufacturing processes, manufacturing process development, material characterization and development, and design validation. Hands-on semiconductor wafer fabrication process and process integration challenges. Reliability failure statistics, physics, failure mechanisms, and failure analysis methodologies. Experience in of SPC/DOE principles, DOEs execution, and statistical analysis. Data extraction and analysis skills (JMP/Crystal Ball/ILM/REL/PCS/SQL Scripting). Experienced in model-based problem solving and familiar with other industry standard problem-solving techniques (5 why's, 8D). Knowledge of photonic datacom and telecom reliability qualification standards such as Telcordia GR-468, AEC-Q102. Requirements listed would be obtained through a combination of relevant industry job experience, internship experience, and/or schoolwork/classes/research. Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, New Mexico, AlbuquerqueAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroBusiness group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $141,910.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, New Mexico, Albuquerque; US, California, Santa Clara; US, Oregon, HillsboroType: Full time

Job Details:Job Description: This role reports to the Close, Consolidations, and Reporting Controller and is responsible for leading a global team across the United States, Costa Rica, Malaysia, and Vietnam.The Accounting Manager leads Intel's management reporting processes, including quarterly executive reporting, balance sheet and cash flow reporting, and related financial analysis. This role partners closely with the Close and Consolidations teams to ensure accurate and timely reporting of consolidated financial results and collaborates with External Reporting on SEC filings (10-Q and 10-K).This position plays a critical role in delivering financial insights to senior leadership, driving accountability across reporting processes, and advancing continuous improvement through automation and process transformation. Success in this role requires strong financial reporting expertise, business partnership, strategic thinking, and the ability to influence across a complex global organization.This position is not eligible for Intel immigration sponsorship.Key Responsibilities:Lead and develop a global team responsible for management reporting, balance sheet analysis, cash flow reporting, and related financial analysisLead quarterly management reporting processes, including executive reporting packages, financial results analysis, variance explanations, and management commentaryOversee the preparation and analysis of the consolidated statement of cash flows and related reportingPartner with the Close and Consolidations teams to ensure management reporting is complete, accurate, and aligned with consolidated financial resultsCoordinate with Finance stakeholders to identify and resolve reporting issues, dependencies, and risks during monthly and quarterly close cyclesPartner with External Reporting to support Forms 10-Q and 10-K, including financial statement analysis and disclosure-related informationCollaborate with Corporate Planning, Revenue Accounting, Treasury Accounting, Tax, Investor Relations, the CFO Office, and other stakeholders to support quarterly reporting and leadership reviewsTranslate financial results and business drivers into clear, decision-useful insights for senior leadershipSupport external auditor requests related to financial reporting, cash flow, and disclosuresServe as a liaison with IT to assess reporting system impacts, coordinate issue resolution, and communicate risks to relevant stakeholdersLead process improvement and transformation initiatives that strengthen reporting quality, efficiency, scalability, and controlsIdentify and implement opportunities to use automation, technology, and AI-enabled solutions within management reporting processesEstablish and monitor reporting metrics and drive accountability for the quality and timely completion of deliverablesBenchmark management reporting practices and apply relevant leading practices to improve reporting processes and outputsQualifications:This position is not eligible for Intel immigration sponsorship.Required Qualifications:Bachelor’s degree in Accounting, Finance, or related business field8+ years of progressive corporate accounting experience or 7+ years with a Master’s degree3+ years of experience leading, coaching, and developing direct and/or global teamsCPA certificationPublic accounting experience Experience preparing or reviewing management reporting, financial statement analysis, and cash flow reporting in support of external reportingWorking knowledge of financial close, global consolidation, and SEC reporting processes, including Forms 10-Q and 10-KStrong understanding of U.S. GAAP and financial reporting requirementsDemonstrated ability to communicate effectively with senior leadership, cross-functional stakeholders, and global teams, translating complex financial information into clear and actionable insightsDemonstrated ability to build effective partnerships, influence across functions, and foster a culture of accountability, collaboration, and continuous improvementExperience working with financial systems and reporting toolsStrong analytical, organizational, and problem-solving skillsAbility to work hybrid (4 days per week in-office) from our Jones Farm, OR or Chandler, AZ office locationsPreferred Qualifications: Experience working in a global, matrixed organizationAbility to drive process improvement and transformation initiativesJob Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, PhoenixPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $138,820.00-195,980.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, Arizona, PhoenixType: Full time

Job Details:Job Description: The IT organization is seeking a Director/Senior Manager of Business Operations to lead a centralized team supporting Global IT segments. This role is critical to driving financial execution, operational rigor,and strategic decision-making across the organization, for both Capital and Expense management across GIT.This leader owns the development of the Plan of Record (POR) in close partnership with Finance, ensuring accurate financial planning, strong reporting, and clear multi-year insights to the CIO. Beyond financial oversight, the role is focused on solving complex business problems, enabling data-driven decisions, and improving how the organization operates.The Director/Senior Manager serves as a trusted advisor to IT segment and department leaders, leveraging funding strategies to enable new critical initiatives, remove constraints, and deliver outcomes while maintaining overall budget discipline. This role translates financial and operational data into actionable strategies that drive efficiency, cost optimization, and business impact. Execution speed and Customer perspective (outside-in vs Inside-out mindset) is paramount for this role.Key responsibilities include leading cross-functional planning and execution, driving cost efficiencies and productivity improvements, and establishing scalable, compliant business operations processes and frameworks. The role partners closely with Finance, HR, Legal, and other corporate functions to ensure alignment, governance, and organizational health.This position also leads and develops a high-performing team of business operations professionals, with full accountability for performance, deliverables, and capability building. Success in this role requires setting clear direction, driving disciplined execution, and fostering a culture of accountability, continuous improvement, and operational excellence.Proven ability to influence and partner with senior and executive stakeholders on strategic and operational decisions.Strong interpersonal, communication, and relationship-building skills, with the ability to navigate complex organizational dynamics.Demonstrated success operating in fast-paced, ambiguous environments with competing priorities and high expectations.Experience leading cross-functional initiatives and resolving complex business challenges across multiple stakeholder groups.Strong problem-solving and analytical skills, with the ability to translate data into clear insights and actionable recommendations.Advanced proficiency in data analysis (e.g., Excel) and ability to communicate complex information in a simple, compelling manner.Track record of building and developing high-performing teams, including coaching and mentoring talent.Comfortable working across global teams, functions, and both business and technical domains.SharePoint, or similar tools; experience with Power BI or comparable analytics tools preferred.Demonstrated experience managing financial planning, budgeting, and headcount processes including associated systems and tools.Combined experience in IT and Finance environments required.Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Bachelor's degree in a relevant field with 7+ years of industry experience, orMaster's degree with 5+ years of experience, or equivalent experience in Business Operations, IT, or Finance.7+ years of experience communicating across organizations and levels, including developing and delivering data-driven insights and presentations to senior leadership.7+ years of experience working with business data and Microsoft Office tools, including advanced proficiency in Excel, PowerPoint, and collaboration platforms such as Teams,Preferred QualificationsMBA or equivalent advanced degree strongly preferred.Experience in the semiconductor or related technology industry a plus.Proven project and program management experience, including leading cross-functional initiatives.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $167,740.00-330,130.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, California, Santa Clara; US, Oregon, Hillsboro; US, California, Folsom; US, Arizona, PhoenixType: Full time

Job Details:Job Description: Join Intel IT as an MDM Software Application Development Engineer. The software application development engineer defines software application solutions across client, cloud, or enterprise thru industry best practices to fulfill stakeholder and business needs and organizational goals.In this role responsibilities include, although not limited to:Recommend design choices focused on manageability, scalability, usability, resiliency, availability, security, and/or safety for the software structure, protocols, and algorithms.Identifies business requirements, functional and system specifications that meet business user requirements, maps them to systems capabilities and recommends technical solutions.Configures system settings and options, plans and executes unit, integration, and acceptance testing, and creates systems specifications.Collaborates with management, product owners, and project managers to evaluate feasibility of requirements and determine priorities for development.Performs pathfinding, surveys technologies, participates in standards committees, and presents at external and internal events.Interacts with multiple technologists in the company to influence architectures and optimize/customize software offerings.Examines current business procedures, system practices and IT modification design and recommends new improved ones.Designs and develop MDM customizations and systems by analyzing business requirements, configure and automate workflows, studying system capabilities and writing specifications.Performs troubleshooting, solves complex bug issues in production systems or applications, and collaborates with subject matter experts on issues.Anticipates complex issues and discusses within and outside of project team to maintain open communication.Serves as a technical lead on a subsystem or small feature(s), manages projects of small to medium size and complexity, performs tasks, and applies expertise in subject area to meet deadlines.In addition to the qualifications listed below, the ideal candidate will also have:Excellent verbal and written communication skills.A strong team player with initiative, self-motivation, and flexibility in dealing with ambiguous situations.Must be flexible to work with remote teams and handling multiple tasks in a dynamic IT environment.Ability to work in high-pressure, milestone-driven environments, and ability to extend hours during critical cutover cycles.Proven ability to define complex business solutions and system architecture.Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:Bachelor's degree in Cybersecurity, Information Security, Electrical/Computer Engineering or Computer Science and 6+ years of experience -OR- a Master's degree in Cybersecurity, Information Security, Electrical/Computer Engineering or Computer Science and 4+ years of experience -OR- a PhD in in Cybersecurity, Information Security, Electrical/Computer Engineering or Computer Science and 2+ years of experience.Hands-on experience commensurate with degree level related to designing, configuring, and developing SAP MDG and S4 HANA solutions.Practical level experience with ABAP, SAP Fiori, S/4 HANA, ALE and IDOC processing, and SQL Queries.Working hands-on experience in SAP's Material, Bill of Material (BOM), Routing, Work Center, and Production Version master data.Experience in at least one large scale SAP MDM and S4 HANA migration/conversion/transformation program.Preferred Qualifications:Prior involvement in managing or executing data cleansing, data mapping, and data governance areas preferably in SAP environments, along with integration across complex ERP landscapeExperience in developing, normalizing, and maintaining master data standards and definitionsExperience in developing and supporting cross-system integration (SAP + non-SAP)Data migration experience from legacy to new SAP ERP systems.Semiconductor industry experience.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $137,610.00-265,870.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, California, Santa Clara; US, Oregon, Hillsboro; US, California, Folsom; US, Arizona, PhoenixType: Full time

Job Details:Job Description: The successful candidate will be working in Technology Development ESD, LU reliability engineering group focusing on research and development in Electrostatic Discharge (ESD) and Latch-up reliability area. This position is responsible for developing solutions and design rules to ensure ESD and latch-up reliability in circuits. The engineer will be responsible for but not limited to design test structures, run experiments, analyze data from test structures during technology development phase. ESD characterization on test structures using transmission line pulse (TLP) is required. Responsibilities also include develop, document, and publish design rules to aid internal and foundry design teams. Serve as a consultant to design teams to ensure ESD risks are addressed in analog circuits.Qualifications:Minimum Qualifications:Master's degree in Electrical Engineering, Reliability Engineering, Physics, or related technical field.3+ years experiences in ESD or LU reliability engineering3+ years of experience with Device Physics, device characterization and/or basic VLSI design knowledgePreferred Qualifications:Ph.D. in electrical engineering and 1+ years of experience in ESD, LU reliability engineeringExperience in planning and guiding the creation of test structure layout on test chips.Experience in VLSI circuit design, including analog and digital. Knowledge of state-of-the-art ESD circuit design techniques and topologies.Deep understanding of transistor device characteristics and characterization methods.Experience with transmission line pulse (TLP) measurement. Experience on ESD models (i.e. CDM, HBM)Data analysis background (JMP, Excel) to support design of experiments and analysis.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $155,520.00-219,550.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, HillsboroType: Full time

Job Details:Job Description: As the world's largest chip manufacturer, and a global leader in innovation and new technology, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth. We're constantly working on making a more connected and intelligent future, and we need your help. Change tomorrow. Start today.What we offer:We foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results. We give you opportunities to transform technology and create a better future, by delivering products that touch the lives of every person on earth.What we do:Join the Logic Technology Development (LTD) organization, a powerhouse of process technology innovation driving Intel's IDM 2.0 strategy to exceed the aspirations of our global customers. We are seeking a visionary Principal Engineer to lead the charge in Intel's foundry revolution, serving as a strategic technical architect and executive partner in guiding our most critical customers through the entire product development lifecycle. In this leadership capacity, you will orchestrate multidisciplinary strategies spanning device engineering, product integration, and yield analysis to steer customers from critical design tape-out and pre-silicon evaluation through to NPI silicon qualification. Furthermore, you will define the strategic roadmap for Far Back End (FBE) expertise in test, bump, and assembly, ensuring a seamless, scalable transition into High Volume Manufacturing (HVM) and volume ramp. This high-impact role provides executive technical leadership, engages directly with customers, drives the success of multi-billion-dollar programs, and helps shape the future of the global semiconductor industry in the AI innovation era.What you will do:We are seeking an elite level of semiconductor expertise to drive the strategic direction of foundry technology development. Based on your leadership experience, your focus will include:Yield Engineering and Performance OptimizationStrategic Yield / Performance Governance: Establish the overarching yield strategy and governance framework for the foundry product lifecycle, ensuring a seamless transition from design to HVM.Roadmap Architecture: Define and steer the long-term yield / performance goals, technology features and roadmaps for foundry customer silicon in alignment with Intel Business Group, Technology Development, Design Technology Platform.Systemic Loss Mitigation: Lead high-level strategic initiatives to identify and eliminate systematic and parametric yield detractors, directing cross-functional teams across Process Integration, Device Engineering, and Defect Metrology.Predictive Modeling Strategy: Oversee the development of advanced predictive models, using AI/ML, for parametric and defective loss, ensuring projection accuracy for test chips and high-volume products.Metric Correlation Frameworks: Define the standards for correlating inline process metrics with end-of-line yield and performance to institutionalize better process control across the organization.Product Integration and NPI ExecutionNPI Strategic Leadership: Direct the execution of New Product Introduction (NPI), overseeing wafer lot progress, skew split strategy, and targeting for flagship customer products.Device Performance Strategy: Lead the analysis of device performance and variability for logic, SRAM, and emerging device types to ensure industry-leading specifications.Experimental Design Oversight: Architect complex Design of Experiments (DOE) and skew split plans to optimize product health and accelerate time-to-market.Technology Compliance: Ensure organizational adherence to critical customer technology metrics, including fab process yield, E-Test (ET), WAT/C, and Cp/Cpk.Design Enablement and PDK ManagementPDK Strategic Vision: Drive the vision for high-quality Process Design Kits (PDKs), ensuring they are optimized for customer success through rigorous validation of metrology and yield data.Simulation Standards: Oversee the Sil2Sim (Silicon-to-Simulation) correlation frameworks and layout effect assessments to reduce design iterations.Governance and Risk Management: Chair or provide executive guidance to the Waiver Review Board (WRB) to assess and mitigate risks associated with DRC violations.IP Ecosystem Development: Lead the strategy for intellectual property (IP) design activities, ensuring robust design rules and seamless mask tape-out execution.Cross-Functional Interface and Customer ManagementExecutive Technical Liaison: Serve as the primary executive process expert and strategic interface between external foundry customers and internal leadership.Strategic Communication: Deliver high-level technical readouts and strategic health reports on process development to Intel senior management and C-suite customer stakeholders.POR Accountability: Own the LTD customer technology deliverables and the product Plan of Record (POR), ensuring alignment with corporate execution goals.Escalation Management: Act as the final point of resolution for critical technical blockers, managing the organizational response to complex customer requests.Operational Excellence and Ecosystem DevelopmentFoundry Ecosystem Design: Define and institutionalize best-in-class foundry customer service practices and IP/data management systems to scale the business.Organizational Standardization: Drive the transformation of operational systems and methodologies to improve global efficiency and standardization across fab and development teams.Continuous Improvement (CIP) Leadership: Lead the central TD factory teams in auditing and improving product yield/performance commits through the Continuous Improvement Program.• End-to-End Integration: Architect the integration between development, assembly, and test teams to ensure a cohesive flow from wafer to final package.Qualifications:Minimum QualificationsMaster's Degree with 13+ years of experience OR PhD Degree with 10+ years of industry experience. Accepted degrees in Electrical Engineering, Materials Science, Physics, Chemical Engineering or other relevant engineering or physical science discipline.The years of related work experience listed above must be in the field in at least one of the following areas: Semiconductor integration, device engineering, or yield engineering.Preferred Qualifications:10+ years of direct semiconductor yield and performance analysis and strategic engineering leadership.Proven track record in yield pareto construction, modeling, projection, and the development of long-term yield roadmaps.Proven track record in process integration, device engineering, performance projection, and the development of long-term performance roadmaps.Extensive experience leading a foundry team or managing high-level foundry customer collaborations.Expertise in interpreting complex product data (inline, e-test, and SORT) to drive organization-wide solutions.Deep knowledge of inline inspection methods and SORT programs.Deep experience collaborating with fabless design houses on product development cycles.Proven history of executive-level customer service and strong customer orientation in a foundry environment.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, California, Folsom; US, California, Santa Clara; US, Texas, Austin; US, Arizona, PhoenixType: Full time

Job Details:Job Description: Drive the Future of Computing at IntelJoin Intel's Silicon & Platform Engineering Group as a CPU Design Verification Engineer on the innovative ATOM team, where you'll be instrumental in developing next-generation, power-efficient processors that define the future of computing. You'll work on cutting-edge CPU architectures that power everything from ultra-mobile devices to edge computing solutions, directly impacting billions of users worldwide.The Role and ImpactAs a CPU Design Verification Engineer, you'll play a pivotal role in ensuring the functional correctness and performance of Intel's ATOM processor family. Working alongside world-class CPU architects, RTL designers, and physical design teams, you'll help validate designs that meet rigorous functional, performance, and power efficiency goals. This is your opportunity to tackle complex technical challenges while contributing to products that shape the computing landscape.What You’ll DoKey responsibilities will include but not limited to:Lead Comprehensive CPU VerificationDevelop and execute sophisticated verification plans to validate CPU logic against architectural and microarchitectural specificationsCreate scalable, reusable verification environments using UVM-based testbenches and advanced functional coverage modelsPerform in-depth functional coverage analysis, identify critical verification gaps, and implement strategic closure plansDrive Technical Excellence Through InnovationExecute complex system-level simulations to validate functionality, power consumption, and timing characteristicsDebug and perform root-cause analysis of issues in pre-silicon environments, implementing robust corrective measuresDevelop automation scripts and tools using Python, Perl, C++, or similar languages to optimize verification workflowsCollaborate for Maximum ImpactPartner closely with CPU architects, RTL developers, and physical design teams to verify complex architectural featuresMaintain and enhance verification infrastructure, methodologies, and automation flows to maximize team productivityDocument comprehensive verification strategies and lead technical reviews with cross-functional stakeholdersContribute to CPU architecture and microarchitecture feature definition to achieve optimal functional, performance, and power targetsBehavioral traits that we are looking for: Strong analytical and problem-solving skillsClear verbal and written communicationCollaborate across diverse teams and disciplinesWork in a fast-paced, evolving technical environmentOwnership mindset with attention to detailContinuous learning and curiosity for new technologiesAbility to work independently while contributing effectively to a teamWhy Join UsWork on industry-leading CPU technologiesCollaborate with world-class engineering teamsContribute to products used worldwideGrow your technical expertise and careerIntel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life. See Intel Benefits for more details.Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship InformationMinimum Qualifications and Experience:Bachelor's in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field with 1+ years of relevant experience. Or Masters or a PHD in the same filed with 3 months of educational or work experience.You must have the experience describe above in the following:Hardware modeling languages such as Verilog, VHDL, or SystemVerilog, and industry-standard simulation tools.Experience developing UVM-based testbenches for reusable and scalable verification environments.Programming skills in at least one language such as Python, Perl, or C++.Computer architecture fundamentals, with emphasis on CPU microarchitecture.Experience in debugging and validation, including functional coverage analysis, test development, and root cause analysis.Preferred Qualifications and Experience:Knowledge of x86 architecture, Intel Architecture ISA, and assembly programming.Experience in pre-silicon and post-silicon CPU verification, debugging, and analysis, including identifying and closing coverage gaps.Familiarity with software validation techniques such as microcode, firmware, or low-level code generation.Experience using industry-standard simulation tools like Synopsys VCS and version control systems such as Git.Demonstrated technical ownership in CPU microarchitecture, design, or verification with hands-on expertise.Innovative application of AI or automation to enhance verification processes and accelerate validation timelines.Become part of a team that values innovation, collaboration, and technical excellence. Make a global impact by contributing to Intel's mission to engineer world-changing technology. Apply today to shape the future of computing.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Texas, Austin; US, Oregon, HillsboroType: Full time

Job Details:Job Description: Join Intel and build a better tomorrow.What we do: The Intel Foundry MDCE and Logic Technology development (LTD) organizations delivers process technology innovation to drive Intel's product roadmap.What we offer:• We give you opportunities to transform technology and create a better future by delivering products that touch the lives of every person on earth.• As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results.• We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation).• We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and many more creative perks that make Intel a Great Place to Work.• We give you opportunities to transform technology and create a better future by delivering products that touch the lives of every person on earth.Benefits:We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and many more creative rewards that make Intel a Great Place to Work Find more information about our amazing benefits here.The ideal candidate should exhibit behavioral traits that indicate:Job Responsibilities include but are not limited to:1. Process Flow Development• Develop and define integrated front end process flows for new technology nodes.• Coordinate across lithography, etch, deposition, diffusion, wet clean, CMP, and metrology teams.• Establish process windows and integration schemes.2. Yield and Defect Reduction• Analyze yield loss and parametric failures.• Perform root cause analysis using statistical tools (SPC, DOE, FMEA).• Drive corrective actions to improve yield and cycle time.3. Device Performance Optimization• Ensure electrical parameters meet design targets.• Work closely with device engineers to tune process conditions.• Optimize critical dimensions (CD), overlay, and film thickness.4. Process Control and Monitoring• Implement control plans and process monitoring strategies.• Use statistical tools such as: Cpk / Ppk, Control charts, Capability analysis5. Technology Transfer• Support ramp from RnD to high-volume manufacturing (HVM).• Document process specifications and standard operating procedures (SOPs).6. Cross-Functional Collaboration/Work with• Device Engineering• Equipment Engineering/Module Engineering• Yield Engineering• Reliability Teams• Design TeamsQualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:•Candidate must possess a PhD degree in one of these fields: Electrical Engineering, Physics, Applied Physics, Optics, Material Science, Chemical Engineering, Mechanical Engineering, or related discipline.•Candidate must possess at least one of the following:6+ months experience on one or more of the following areas:o Semiconductor device fabrication or nanotechnology.o Electrical characterization of transistors or other semiconductor devices.o Clean room process development.Preferred Qualifications:• JMP, MATLAB, Scripting languages (1.e. Python, JSL, TCL), or programming languages (1.e. SQL, C/C++).• Strong understanding of Device physics (CMOS, FinFET, GAA, etc)• Hand on experience in VLSI device fabrication and testing in the lab.• Knowledge of basic VLSI fabrication instruments (1.e. mechanism of dry etcher, ALD (atomic layer deposition), PE CVD, metallization, etc.)• Understanding statistical process control and charting methodology data flow and integrity. Strong data analysis and presentation acumen.• Integrated process knowledge, including strong design of experiments and model-based problem-solving skills for complex problems, excursions, and defects.• Knowledge of automation and defect classification systems in a fab environment.• Strong stakeholder management and influencing skills. Experience in coordination with other departments, co-workers, etc.Interview Tips here.By applying to this posting your resume and profile will become visible to Intel Recruiters and will allow them to consider you for current and future job openings aligned with the skills and positions mentioned above.Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.Benefits at IntelOur total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, PhoenixPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $103,730.00-198,820.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, Arizona, PhoenixType: Full time

Job Details:Job Description: This position is in the Intel Foundry team working in one of the most advanced semiconductor process technologies in the world. You will design, execute, and analyze experiments to develop the process of the next technologies to come into the market. Come join us and help shape the future of the semiconductor process for decades to come.What we offer:We foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results. We give you opportunities to transform technology and create a better future by delivering products. Intel Corporation Core Values here.Benefits:We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and many more creative perks that make Intel a Great Place to Work. Find more information about all of our Amazing Benefits here.What we do:The Intel Foundry organization delivers the latest process technology innovations to drive Intel's amazing product roadmap. Look at Life Inside Intel here.What you will be considered for:Intel Foundry Module Development Engineers are responsible for leading scientific research enabling the manufacture of innovative device architecture but not limited to:Led scientific research enabling the manufacture of innovative device architectures coupled with the realization of these architectures.Designing, executing, and analyzing experiments necessary to meet engineering specifications for their process.Participate in the development of intellectual property.Integrate the many individual steps necessary for the manufacture of complex microprocessors.Ramp to manufacturing volumes to demonstrate the technology meets requirements while simultaneously transferring the technology to counterparts in manufacturing via the Copy Exactly Methodology.Qualifications:You must possess the minimum qualifications below to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum QualificationsMaster's degree with 5+ years of experience OR PhD with 1+ years of experience in Materials Science, Chemical Engineering, Chemistry, Physics, Mechanical Engineering, Electrical Engineering, or a related Scientific STEM (Science Technology Engineering Math) field of study with a focus on hands-on experimental research.Preferred Qualifications:4+ years of Semiconductor Industry experience in one or more of the following areas: Semiconductor processing, Semiconductor fabrication, or nanotechnology.Semiconductor processing or device fabrication and/or nanotechnology with a wet etchStrong expertise in chemical processing and chemical developmentExperience leading projects and leading cross-functional teams.Process control systems, methodologies, sources of variability, and statistics.External Foundry ExperienceWe are constantly working on making a more connected and intelligent future, and we need your help. Change tomorrow. Start today.Interview Tips:Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $133,800.00-255,200.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, HillsboroType: Full time

Job Details:Job Description: The Advanced Packaging Technology Development (APTD) Metrology Group at Intel sits at the heart of our most critical technology development and pathfinding programs. As packaging architectures grow increasingly complex, the role of metrology has evolved far beyond traditional inspection and measurement — it has become a strategic enabler of technology progress, yield learning, and program decision-making confidence.We are seeking a Senior Module Development Engineer who combines deep hands-on expertise in next-generation metrology equipment with a broad, current awareness of where the semiconductor metrology industry is heading. The ideal candidate brings the technical credibility to work at the equipment level and the strategic clarity to translate industry knowledge into a forward-looking roadmap that keeps our capabilities ahead of program demand. This requires genuine engagement with the global metrology landscape — staying current with advances in measurement science, emerging equipment capabilities, and evolving industry standards — and applying that knowledge with sound judgment and determine which capabilities are worth pursuing and when.This engineer will be embedded in our most advanced development and pathfinding programs from their earliest stages — ensuring that measurement strategies are defined, equipment is ready, and metrology coverage is in place before process flows are locked and before gaps can become program risks. A critical dimension of this role is the end-to-end qualification of new metrology equipment — taking ownership from initial tool installation and acceptance testing through process validation and full fab readiness — ensuring every new tool meets the performance and capability standards our programs require. This engineer will also serve as a key technical resource for fab support, and ensuring the metrology tool fleet consistently operates at the highest level of performance and availability. The ability to move fluidly between strategic roadmap work and hands-on fab problem solving is essential — and is what makes this role both uniquely challenging and uniquely rewarding.This is a role that demands technical depth, industry awareness, and the ability to lead with influence across a wide range of partners — from process integration and module engineering to advanced process control, AI and automation, and senior program leadership. The ideal candidate resolves complex process challenges with the same confidence and credibility they bring to presenting a technology investment case to senior leadership.Key Responsibilities:Drive technology development and enablement across both high-volume manufacturing and future technology nodes — delivering process integration and equipment solutions that meet desired device specifications and performance targetsLead the design and development of technically sophisticated metrology and inspection processes including material selection, parameter optimization, equipment configuration, and system design to enable new product architectures and functional requirementsDefine and own the metrology group's long-range technology roadmap translating a deep understanding of industry trends, emerging measurement technologies, and program requirements into a clear, prioritized strategy that keeps our capabilities ahead of demandPerform pathfinding activities in support of process and hardware development enabling the manufacturing of innovative device architectures and developing roadmaps for technologies that support future program needs.Conduct process technology feasibility studies through theoretical simulations and practical engineering methods providing early, evidence-based assessments of new measurement approaches before committing to full qualification Evaluate and qualify next-generation metrology and inspection equipment end-to-end — from installation and acceptance testing through process validation and full fab readiness — ensuring every new tool meets the performance and capability standards our programs require.Serve as the primary technical resource for fab support — providing engineering disposition on process excursions, driving resolution of metrology-related program holds, and maintaining the tool fleet at the highest level of performance and availability.Recommend and implement equipment and process modifications that improve production efficiency, optimize output, and enhance manufacturing techniques for both existing and next-generation products.Partner with key equipment and materials suppliers to develop and implement enabling elements of the technology — building direct technical relationships that go beyond standard supplier engagement to actively co-shape next-generation tool capabilities and roadmaps.Remain current on relevant industry process, materials, and metrology trends — developing a forward-looking view of future technology needs and partnering with the vendor ecosystem to build a cost-sensitive, capability-driven roadmap that pushes the industry forward.Lead metrology module development across multiple concurrent advanced packaging programs — taking full ownership from first wafer through process sign-off, including recipe development, specification setting, SPC strategy, and sampling plan definition.Design and implement rapid inline feedback mechanisms that compress the time between experiment execution and actionable insight — directly accelerating cycles of learning across TD and pathfinding programs.Collaborate with AI, machine learning, and advanced process control teams to develop intelligent monitoring and excursion detection strategies — evolving from threshold-based alarms toward predictive, context-aware process control.Represent the metrology group in cross-functional program reviews — communicating metrology readiness, capability status, and risk with clarity and credibility to integration, process, and senior program leadership teamsQualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum QualificationsBachelor's degree in Materials Science, Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, Chemistry, or related STEM field with 6+ years of relevant experience.OR Master's degree in the same fields with 4+ years of relevant experience.OR PhD in the same fields with 2+ years of relevant experience.Expertise in semiconductor processing, wafer-level assembly, or cleanroom environments.Proficiency in process development methodologies, statistical process control, and manufacturing process improvement.Technical expertise in module engineering or fab process/hardware technology development.Preferred QualificationsStrong metrology fundamental understanding and development experience.Strong collaboration skills with cross-functional teams, including yield and operations.Demonstrated ability to leverage data analysis tools for process optimization and continuous improvement.Experience with packaging processes, equipment automation development, or project management.Passionate about advancing Intel's strategic goals and driving meaningful industry advancements.Experience in Python, Dashboard Creation, and ScriptingDirect experience engaging with metrology equipment vendors at a technical roadmap level as a co-development partnerJoin Intel and take advantage of this opportunity to innovate, collaborate, and shape the future of semiconductor technology. Apply now to become an integral part of Intel's dynamic and forward-thinking team.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $155,520.00-219,550.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, HillsboroType: Full time

Job Details:Job Description: Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision.Life at Intel: As a Yield Development Engineer, you will be at the forefront of advancing Intel's cutting-edge process technologies within our Logic Technology Development (LTD) organization. This pivotal role involves identifying root cause yield limiters and driving solutions that enhance manufacturability and yield across technology nodes. You will work within a dynamic, fast-paced environment to ensure the successful introduction of new products, process improvements, and robust methodologies to meet manufacturing goals. Your expertise will directly contribute to Intel's ability to deliver world-class semiconductor solutions and advance the future of computing.About Intel FoundryAt Intel, the Foundry Technology Development (TD) unit is the driving force behind Moore's Law, enabling us to create groundbreaking technology that enriches lives globally. With over 15,000 dedicated employees, Foundry TD spearheads innovative research, develops next-generation processes and packaging technologies, and manages high-volume manufacturing in state-of-the-art facilities. Within Intel Foundry TD, our Logic Technology Development (LTD) organization is at the forefront of creating and refining each process technology node, paving the way for tomorrow's computing solutions.Your responsibilities as a Yield Development Engineer will include but not be limited to: Develop methods, processes, and systems to consolidate and analyze diverse big data sources for defect mode understanding and yield modeling.Perform statistical analysis, create visualizations, and construct process development roadmaps that drive technology yield milestones.Extract insights from structured and unstructured data using advanced statistics, machine learning, and coding techniques.Organize, interpret, and structure insights from fab process, defect, and electrical data while identifying anomalies to drive process changes for yield enhancement.Develop multivariate algorithms and tools to identify root cause yield limiters and recommend process changes for yield improvement.Collaborate with design teams to resolve yield issues, ensuring manufacturability across process and product specifications before ramping production.Execute new product introductions, enable design-technology co-optimization, and participate in design of experiments with factory task forces.Develop measurement recipes for rapid feedback on product integrity and address issues impacting yield or product quality.Create and harden systems capable of meeting operational needs for leading-edge logic nodes, working with equipment vendors and internal collaborators.Develop AI/ML applications and computational tools to bridge the gap between design and manufacturing, improve design efficiency, and reduce debug time.Document technical procedures, train colleagues, and debug equipment, software, and procedural failures in production environments when required.Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates Experience listed below would be obtained through a combination of your schoolwork, classes, research and/or relevant previous job and/or internship experiences.Minimum qualifications:Ph.D. in semiconductor science-related STEM degree in engineering, physical science, computer science, or related field.2+ years of experience in advanced semiconductor devices and process flowPreferred qualifications:2+ years of experience with data analysis systems and software tools2+ years of experience in yield projection with EOL signals and in line parametersProject/program management experience with strong self-initiative and self-learning capabilities.Proven track record of working across organizations through matrix structures to accomplish strategic objectives with conflicting priorities.Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet.Interview Tips: https://www.intel.com/content/www/us/en/jobs/hiring.htmlJob Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $133,800.00-255,200.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, Texas, AustinType: Full time

Job Details:Job Description: Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below.Life at IntelAbout the team and organization: Compact Device Modeling Group (CDMG) is part of Intel's Design Technology Platform (DTP) organization. DTP is a key pillar in enabling Intel to deliver design, development and manufacturing services that allow Intel Foundry customers to deliver winning products to the marketplace. Your work will directly enable design teams to get to the market faster with leadership products based on innovative technologies. As a member of CDMG you will be at the forefront of co-optimizing Intel's state-of-the-art process technology which allows customers with diverse design needs to enable best-in-class products for data-centric applications.As a semiconductor device modeling engineer, you will be playing a key role to support compact modeling activities for Intel's new technologies.Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications• Bachelor's degree in Electrical Engineering or a related discipline and 5+ orMaster's degree in Electrical Engineering or a related discipline and at least 3 years of industry experience in the semiconductor field; or Ph.D. in Electrical Engineering or a related discipline.• Graduate coursework or research experience in semiconductor device physics or 5+ years of work experience in Semiconductor device physics.• 1+ years' experience Python scripting for data analysis, automation and documentation.Preferred Qualifications• Ph.D. in Electrical Engineering or a related discipline with 3+ years of industry experience in the semiconductor field.• Proficiency with extraction tools (e.g., ICCAP, MBP) and commercial simulators such as HSPICE, Spectre, etc.• Hands-on experience with BSIM-CMG and other compact models for transistor modeling at advanced nodes (e.g., FinFET, GAA) including experience in one or more of the following areas:Experience developing Layout-dependent effects (LDE) for FinFET or GAAFET technologies and their impact on circuit performance.Development of methodologies for device targeting (e.g., transistors) and benchmarking circuits (e.g., ring oscillators), including corners and statistical variation models.Modeling using Open Model Interface (OMI).Strong understanding of process flow, layout, and basic circuit design/simulation.Modeling self-heating effects and their influence on device and circuit performance.Proven capability to collaborate across multiple teams and geographies.Experience with machine learning algorithms and their application is data analysis and compact model development.Benefits at IntelOur total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, California, Santa ClaraPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $128,880.00-245,160.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, California, Santa ClaraType: Full time

Job Details:Job Description: The Role and Impact:Join Intel as a Process Integration and Yield Engineer, where you will play a critical role in advancing semiconductor manufacturing excellence. In this position, you will define process roadmaps, establish procedures, and lead initiatives to ensure seamless integration of cutting-edge technologies into high-volume manufacturing. Your contributions will directly impact Intel's product quality, operational efficiency, and ability to deliver innovative solutions that drive the future of technology.Business group:The Process Integration and Yield Engineering team is part of Intel Foundry, a key business group committed to developing and sustaining world-class semiconductor manufacturing processes. This team plays an integral role in driving quality improvements, yield optimization, and technological innovation to support Intel's broader goals of delivering industry-leading products and solutions. Through collaboration across teams, they ensure reliable process integration and continuous improvement to maintain Intel's leadership in the industry.Key Responsibilities:- Develop and define process integration roadmaps to meet technology transfer requirements, performance goals, and milestones.- Establish process flows, procedures, and equipment configurations for module integration.- Analyze structured and unstructured data using statistical methods, machine learning techniques, and tools such as SQL and Python to derive actionable insights.- Perform low-yield analysis and lead yield improvement initiatives within startup and high-volume production environments.- Implement continuous improvement programs to sustain quality and minimize yield excursions.- Conduct quality and reliability risk assessments for manufacturing materials and process changes.- Collaborate with internal teams and external stakeholders to optimize manufacturing processes and address challenges.- Mentor team members, foster technical growth, and drive impactful solutions within Intel's engineering community.Qualifications:Minimum Qualifications:Bachelor's degree in Electrical Engineering, Electrical Computer Engineering, Chemical Engineering, Material Science, Physics, Chemistry, or a semiconductor-related STEM field and 4+ years of hands-on experience in semiconductor manufacturing or related field OR Master's degree in the same disciplines and 3+ years of relevant experience OR Ph.D. with no prior professional experience.Proficiency in data analysis tools such as SQL, Python, and statistical modeling techniques.Experience with semiconductor manufacturing processes and integration methodologies.Preferred Qualifications:Advanced degrees in engineering, material science, or a related technical field.Demonstrated ability to lead and mentor within a collaborative environment.Expertise in driving process improvements and quality assurance in high-volume production.Strong problem-solving skills and experience in formulating technical strategies that align organizational goals with industry advancements.We invite you to explore this unique opportunity to contribute your expertise, lead impactful innovations, and collaborate with a dynamic team dedicated to shaping the future of semiconductor technology.Job Type:College GradShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $120,860.00-170,630.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, HillsboroType: Full time

Job Details:Job Description: As a Silicon Packaging Architect, you will play a pivotal role in designing and driving end-to-end package solutions that meet physical, electrical, and cost requirements while ensuring high-quality output. You will oversee the complete packaging development process, from design through production readiness, resolving technical challenges and delivering innovative, cost-effective solutions. Your expertise in package architecture will contribute directly to Intel's success by enabling seamless integration of silicon and hardware technologies.Business group You will be part of a dynamic organization focused on delivering cutting-edge packaging solutions that align with Intel's broader innovation goals. This team works collaboratively across silicon, hardware, and manufacturing domains to ensure that Intel's products meet stringent performance, reliability, and quality standards. Together, the group contributes to Intel's leadership in advanced semiconductor packaging technologies, enabling the creation of world-class products.Key Responsibilities Translate product requirements into detailed package architecture specifications. Lead technology trade-off decisions ensuring packaging solutions meet electrical, mechanical, thermal, and reliability standards. Collaborate with silicon, hardware, and package leads to deliver high-quality package outputs and address roadblocks. Oversee the packaging development process, including design, processes, and procedures, while driving continuous improvement in packaging quality standards. Apply expertise in troubleshooting package designs, resolving technical issues, and delivering innovative, cost-effective solutions. Partner with manufacturing teams to ensure seamless design-to-production transitions and support tape-out readiness. Utilize Design for Manufacturing (DFM) principles to optimize package designs for manufacturability and production efficiency. Maintain and refine technical documentation to support package development processes.Behavioral traitsExcellent analytical, communication, and problem-solving skills to influence and drive results effectively. Collaborate cross-functionally with diverse teams in silicon, hardware, and manufacturing domains. Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum QualificationsBachelor's degree Mechanical Engineering, Electrical Engineering, Materials Science or related field with 9+ years of hands-on experience OR a Master's degree in a relevant field with 6+ years of hands-on experience OR a PhD in a relevant field with 4+ years of hands-on experience4+ years of experience in:Defining semiconductor/electronic package architectures and developing technical documentation.Experience applying Design for Manufacturing (DFM) principlesUtilizing Design of Experiments (DOE) methodologiesTroubleshooting package design and manufacturing issuesPreferred QualificationsAdvanced understanding of semiconductor packaging technologies and industry trends. Experience leading cross-disciplinary teams in a technical environment. We invite you to join us in shaping the future of technology by applying your expertise in cutting-edge packaging solutions. Be part of a dynamic team that thrives on innovation and collaboration, and contribute to creating a lasting impact in the world of semiconductor technology.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, PhoenixPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $190,610.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, Arizona, PhoenixType: Full time

Job Details:Job Description: The Opportunity For nearly a decade, Intel's Neuromorphic Computing Lab-together with a global ecosystem of 250+ research groups-has explored architectures, algorithms, and software inspired by the brain's extraordinary efficiency, scalability, and adaptability. Our Loihi series of research chips pioneered event-driven, sparse, and massively parallel neuro-inspired processing, fueling over 100 peer-reviewed publications that validate the promise of this novel approach. Now, we're entering an exciting new chapter: transforming these breakthroughs into real-world products that will power the coming era of physical AI systems-beyond the reach of GPUs and mainstream AI accelerators. If you are passionate about pushing the boundaries of computing, from transistor-level innovation to software abstractions, join us. Help define the next wave of AI technology that harnesses the proven advantages of Intel's neuromorphic computing technology with the versatility demanded by modern AI workloads. Position Overview As our silicon team grows, we are seeking a front-end silicon lead to manage both the design and verification of our neuromorphic chiplets and IP. This principal-level role calls for a talented technical leader with a track record of realizing new processor and accelerator architectures, plus strong SoC integration experience including high-speed interfaces such as Ethernet, PCIe/UCIe, and memory controllers. Your multidisciplinary team will turn emerging neuromorphic and AI accelerator concepts into robust, manufacturable silicon. First-principles thinking and an openness to learning new technologies and methodologies, such as asynchronous design and AI automation, are essential. Responsibilities • Engage with architects and AI researchers to identify hardware innovations and optimizations, and translate them into implementable microarchitectures. • Lead a team responsible for design implementation and verification through post-silicon validation. • Partner with physical/custom design engineers, often first prototyping blocks through place-and-route prior to hand-off, and co-design critical custom circuits such as memories to achieve the best KPIs. • Evaluate, select, and integrate internal and external IP, including I/O interfaces. • Work with software and systems teams to enable development long before tape-out and ensure smooth post-silicon bring-up. • Mentor engineers and strengthen design and verification practices as the program scales.Qualifications:Minimum qualifications• MS in Electrical/Computer Engineering, Computer Science, or a related field.• 10+ years of hands-on design experience in processors, accelerators, SoCs, or custom ASICs.• 5+ years of experience with RTL design (Verilog/SystemVerilog) and modern ASIC flows (synthesis, timing closure, CDC/RDC, formal, DFV).• 3+ years leading silicon design and/or verification teams.Preferred qualifications• PhD with a research background in hardware acceleration, especially AI.• Experience with advanced packaging and heterogeneous integration technologies (e.g., chiplets, UCIe, 2.5D/3D).• Experience with asynchronous design methods and custom memory/circuit co-design.• Experience with pre-silicon enablement via emulation or FPGA prototyping.• Experience with low-power (UPF) methods and security features such as Root of Trust and secure boot.• History of technical ownership on multiple product tape-outs.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, California, Folsom; US, California, Santa Clara; US, Texas, Austin; US, Arizona, PhoenixType: Full time

Job Details:Job Description: Join Intel as a Module Engineer, where you will play a pivotal role in driving innovation and advancing Intel's manufacturing capabilities from component feasibility through high-volume production. In this critical position, you will own and optimize complex manufacturing processes, equipment, and systems that enable the development of cutting-edge integrated circuits and advanced packaging technologies. Your expertise will directly impact Intel's ability to deliver world-class products to market while maintaining the highest standards of quality, reliability, and efficiency. By collaborating with cross-functional teams, equipment suppliers, and leveraging your technical knowledge, you will shape Intel's technological future and contribute to manufacturing excellence that supports the company's position as a global leader in semiconductor technology.Key Responsibilities may include but not limited to: • Lead development and optimization of manufacturing processes, equipment, and systems for high-volume production environments• Conduct feasibility studies, pathfinding activities, and theoretical simulations to support innovative device architectures and process development• Design, develop, and validate test programs to ensure integrated circuits function as intended and meet performance specifications• Implement modifications and improvements to equipment operations targeting safety, quality, cost, productivity, and yield optimization• Collaborate with equipment and material suppliers to design critical technology enablement elements and refine process requirements• Execute maintenance, repair, and continuous improvement activities for production equipment and associated manufacturing components• Develop roadmaps for technology solutions that align with Intel's future product needs and manufacturing capabilities• Monitor product health, analyze performance data, and resolve yield issues through systematic troubleshooting and root cause analysis• Lead technology transfer initiatives to global manufacturing sites through training programs and process standardization• Establish material specifications and quality standards while interfacing with supplier quality and procurement teams• Drive standardization in manufacturing quality systems, product qualification methods, and process documentation• Support factory production commitments by resolving discrepant material issues and containing quality excursionsAnnual Salary Range for jobs to be performed in Hillsboro, OR: $144,253 - $170,630 USDThis position requires work at the Intel site at least 4 days per week in accordance with company policy.Qualifications:Doctorate degree or foreign equivalent in Material Science &/or Engineering, Electrical/Mechanical/Chemical Engineering, or other STEM-related degreeJob Type:Shift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. The range displayed on this job posting reflects the minimum and maximum target compensation for this position. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.Work Model for this RoleThis role will require an on-site presence.*ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, HillsboroType: Full time

Job Details:Job Description: Join the Intel Foundry Capital Incentives team and play a key role in maximizing and managing strategic government funding programs that support Intel's global manufacturing investments. This position offers a unique opportunity to work at the intersection of finance, operations, and public-sector partnerships, helping track and forecast incentives and grants that enable some of the world's most advanced semiconductor manufacturing initiatives.As an Operations Finance Specialist, you will be responsible for forecasting, analyzing, and reporting government incentives and grant programs across multiple regions. You will partner with finance, accounting, operations, and leadership teams to ensure accurate planning, reporting, and financial visibility related to incentive programs.What You'll DoIn this role, your responsibilities may include:Forecasting and tracking government incentives, grants, and related funding programs, including:AMIC (Advanced Manufacturing Investment Credit) and other federal incentive programsInternational government grants and incentive programsU.S. state-level grants and incentive programsSupporting financial planning and reporting processes, including:Annual Planning and Plan of Record (POR) cyclesLong-Range Planning (LRP) and Board of Directors (BOD) review cyclesMonthly and quarterly financial close processesDeveloping and maintaining cash flow forecasts related to incentive and grant fundingPerforming Working Inventory Forecasting (WIF) and related financial analysesPreparing financial models, variance analyses, and executive-level reportingSupporting internal and external audit requirementsAssisting with compliance reporting and documentation for incentive and grant programsPresenting financial insights and recommendations to management and key stakeholdersCollaborating cross-functionally to improve forecasting accuracy and reporting efficiencyQualifications:This position is not eligible for Intel immigration sponsorship. You must possess the below minimum qualifications to be initially considered for this position.Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:Bachelor's degree in Finance, Accounting, Economics, Business, or a related field1+ years of experience in finance, accounting, financial planning and analysis (FP&A), corporate finance, or a related roleStrong analytical, forecasting, and problem-solving skillsAdvanced proficiency with MS Excel and working with large data setsPreferred Qualifications:Experience forecasting:Capital Expenditures (CapEx)Depreciation, Plant, and Network (DPN) or similar fixed asset metricsCash FlowExperience supporting government grants, tax incentives, or large capital investment programsExperience creating and delivering presentations to senior leaders and management teamsAdvanced financial modeling and reporting skillsExperience working in a manufacturing, technology, semiconductor, or capital-intensive industryRequirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, New Mexico, Albuquerque, US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $73,820.00-137,230.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Arizona, Phoenix; US, New Mexico, Albuquerque; US, Oregon, HillsboroType: Full time

Job Details:Job Description: Intel leads the semiconductor industry by creating innovative technologies. This is openings to hire junior level TEM Metrology Engineer in Hillsboro, Oregon, focusing on transmission electron microscopy (TEM) metrology data generation and analysis. This is for day shift positions in TEM metrology group supports manufacturing process development for next generation of Intel chip with Integration, Module, inline Defect metrology and Yield analysis group partners by providing critical dimension TEM data for manufacturing process control and yield improvement.The successful candidates require basic electron microscopy background and experiences on massive dimensional metrology data collection and analysis, automated metrology SW development, experience on various dimensional data mining from images, image processing, and experience in building BE/FE development to optimize automated dataflow, statistical data analysis and other skillsets related metrology. This is a cross-functional role position working closely with automated TEM tool operation team as well as working internally with TEM data analysis engineers that requires clear communication and strong collaboration as one team. Continuous upgrading of skillset with open attitude and ability to learn from colleague are needed.Behavioral traits:• Ability to communicate and collaborate effectively within cross-functional teams consisting of tool owner team, operation technicians, data analysis engineering team and manufacturing process engineering organizations.• Ability to communicate technical findings and reliability risks to stakeholders in a clear and concise manner.• A proactive mindset for continuous learning, process improvement, and applying new technologies to solve challenges.Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications will be considered plus factors in identifying top candidates. Relevant experience can be obtained through classes and research projects, internships, military training, or work experience. Successful applicant must be a good team player and able to work efficiently and independently.Minimum Qualifications:• Bachelor's or Master's degree in Materials Science, Mechanical Engineering, Electrical Engineering, Data science, Computer science, or related technical field.At leats 2 years of Technical Experience in:• Knowledge of semiconductor manufacturing processes or experience working in a high-volume manufacturing environment with statistical analysis, design of experiments (DOE), SPC, or structured problem-solving methodologies.• Strong analytical and problem-solving skills, with the ability to leverage data to identify trends, investigate root causes, and support engineering decisions.• Experience using programming languages and data analysis and visualization tools such as Python, SQL, Power BI, or Tableau to analyze manufacturing or engineering dataPreferred QualificationsThe following qualifications would be considered an advantage:• 3+ years industrial experience related technical fields• Experience with tools such as python and OpenCV to perform tasks related to all aspects of development, including data extraction, end-to-end automation pipeline design, and data filtering.• Experience with machine learning, predictive analytics, computer vision, or AI-based engineering projects is considered a strong plus.• Experience with software development practices, including version control (Git), REST APIs, front-end or back-end development, database design, or cloud-based applications.Job Type:College GradShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $89,010.00-125,660.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, HillsboroType: Full time

Job Details:Job Description: Position SummaryIntel IT is a global organization delivering connectivity services across manufacturing and foundry environments, campus spaces, cloud services, and corporate services, seeking a Senior Network Operations Engineer for an exciting opportunity to help shape the future of global network operations.This is a hands-on engineering role focused on actively engaging in technical details, operational issues, and execution barriers across Intel's global network footprint. This engineer will help ensure the quality, reliability, uptime, and operational readiness of the network services that enable Intel's business, while raising the standard of operational execution, service reliability, accountability, and future-ready network operations.The role will focus on improving incident response, change quality, operational readiness, root cause follow-through, documentation, monitoring, and execution consistency across network operations teams. This person will also help lead the global operational deployment of new engineering-released network products, ensuring new capabilities are supportable, well-documented, monitored, and ready for reliable execution at scale.The successful candidate will bring strong enterprise networking experience, practical operational judgment, and the ability to lead cross-functional improvements across globally distributed teams. This role is intended for someone who is viewed as a technical leader today and has the potential to grow into formal leadership or management responsibilities in the future.Key Responsibilities• Provide senior technical leadership across global network operations teams, helping improve execution quality, accountability, and operational discipline.• Drive improvements in incident management, problem management, change quality, operational readiness, service reliability, and root cause follow-through.• Lead through influence across operations teams, engineering teams, architecture teams, service owners, vendors, and business stakeholders.• Help lead global operational deployments of new engineering-released network products, ensuring operational readiness, supportability, documentation, monitoring, and scalable handoff into production operations.• Establish and reinforce operational standards, runbooks, escalation models, handoff expectations, service health reviews, and execution practices.• Improve major incident response by strengthening technical triage, escalation quality, communication discipline, recovery planning, and post-incident learning.• Partner with Network Engineering and Network Architecture to ensure new services, platforms, and capabilities are supportable, documented, monitored, and ready for operational handoff.• Identify recurring operational issues and drive corrective actions that reduce repeat incidents, improve stability, and increase service reliability.• Improve change execution quality through better risk assessment, technical validation, peer review, rollback planning, communication, and post-change review.• Use operational data, metrics, dashboards, and service health indicators to identify gaps, prioritize improvements, and measure progress.• Mentor engineers and technical leads across operations teams to strengthen troubleshooting methods, ownership mindset, and disciplined execution.• Help define operational expectations for network services across enterprise, manufacturing, campus, lab, data center, wireless, WAN, and related infrastructure environments.• Partner with automation, monitoring, and tools teams to improve visibility, reduce manual effort, and increase operational consistency.• Communicate technical risks, operational gaps, service health concerns, and improvement plans clearly to leadership and cross-functional partners.Qualifications:• Bachelor's degree in Computer Science, Information Technology, Engineering, or a related field, or equivalent practical experience.• 10+ years of experience in enterprise network operations, network engineering, infrastructure operations, or technical service reliability roles.• Strong hands-on technical knowledge of enterprise networking, including routing, switching, WAN, LAN, wireless, data center networking, monitoring, and operational support practices.• Experience supporting mission-critical network environments with high availability, reliability, and business continuity expectations.• Strong understanding of incident, problem, change, request, and service management processes.• Demonstrated ability to lead technical improvements across teams through influence, technical credibility, and structured execution.• Experience driving root cause analysis, corrective action plans, operational standards, and continuous improvement.• Experience supporting or leading operational introduction of new network products, platforms, or engineering releases into production environments.• Strong technical troubleshooting skills and ability to guide complex issue resolution across multiple teams and technologies.• Experience improving operational execution through metrics, process discipline, documentation, standards, and service health reviews.• Strong communication skills with the ability to explain technical issues, risks, and recovery plans to both technical and leadership audiences.Preferred Qualifications• Experience supporting global enterprise networks, manufacturing environments, labs, campuses, data centers, or other mission-critical infrastructure.• Experience improving operational maturity across globally distributed teams.• Experience with service reliability practices, ITIL, operational excellence, Lean, Six Sigma, or continuous improvement methods.• Experience with monitoring, observability, telemetry, automation, or AI-enabled operations capabilities.• Experience creating or improving runbooks, operational standards, escalation guides, support models, and service readiness criteria.• Experience working with managed service providers, vendors, telecommunications providers, or outsourced support teams.• Experience mentoring engineers, influencing technical direction, and raising team execution standards.• Advanced networking certifications such as CCNP, CCIE, or equivalent experience.Behavioral TraitsThe ideal candidate will demonstrate:• Strong ownership mindset.• High standards for operational quality.• Ability to lead through influence.• Calm technical leadership during critical incidents.• Strong accountability and technical credibility.• Bias for measurable improvement.• Practical, execution-focused problem solving.• Ability to challenge teams constructively.• Strong coaching and mentoring instincts.• Potential to grow into formal people leadership over time.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $124,110.00-206,510.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Arizona, Phoenix; US, Oregon, HillsboroType: Full time

Job Details:Job Description: Join our Communication Runtimes team as a Senior Cloud Software Development Engineer to develop cutting-edge software features and optimizations for Intel's oneCCL (Collective Communications Library).This role offers the opportunity to build expertise with the latest Intel GPUs and CPUs used in data centers, collaborate directly with scientists and engineers on the Aurora supercomputer at Argonne National Labs, and make meaningful contributions that advance scientific computing and machine learning capabilities.Key ResponsibilitiesCommunication Library DevelopmentDesign, develop, and maintain advanced features and performance optimizations for oneCCL.Optimize software to achieve performance requirements including low latency, high bandwidth, and high reliabilityImplement and enhance communication protocols across multiple layers of the communications stackCross-Functional Collaboration and Requirements Collaborate with cross-functional teams to define software requirements and technical specificationsWork directly with scientists and engineers on high-performance computing applications and supercomputer implementationsPartner with hardware teams to optimize software-hardware integration for maximum performancePerformance Optimization and AnalysisDevelop performance optimizations that improve communication latency and throughputConduct comprehensive performance analysis and benchmarking across different system configurationsDebug complex problems spanning multiple layers of hardware and software stackWhat You'll Work OnAurora Supercomputer: Direct collaboration with Argonne National Labs on one of the world's most advanced supercomputersCutting-Edge Hardware: Latest Intel GPUs and CPUs designed for data center and HPC applicationsImpact: Meaningful contributions to scientific computing breakthroughs and machine learning advancement Innovation: Development of next-generation communication libraries and optimization techniquesCore CompetenciesSelf-driven with high motivation to learn emerging technologiesOutstanding analytical and problem-solving skillsExcellent communication skills for technical collaborationUnderstanding of multiple levels of communications stack architectureQualifications:The Minimum qualifications are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications Master's degree in Computer Science, Computer Engineering or in a STEM related field of Study3+ years of software development experience3+ years of Linux environment development experience3+ years of C and C++ programming experienceExperience with multithreaded programming and parallel computing conceptsSpecialized Experience (At least one required)Distributed computing systems and architectures HPC (High-Performance Computing) communications libraries Collective communications libraries (MPI, oneCCL/NCCL, or SHMEM) GPU software development and optimization Network communications stack development (one or more layers) Preferred Qualifications Ph.D. degree in Computer Science, Computer Engineering or in a STEM related field of StudyExperience developing performance optimizations that measurably improve communications latency or throughputExperience debugging complex problems across different layers of hardware and software stackDeep understanding of high-performance computing architectures and optimization techniquesExperience with Intel GPU and CPU architectures and their optimization characteristicsKnowledge of supercomputing environments and large-scale distributed systemsFamiliarity with scientific computing and machine learning communication patternsJob Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $128,880.00-245,160.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, Texas, AustinType: Full time

Job Details:Job Description: Intel’s AI SoC organization is driving innovation in next-generation ASICs for AI applications across edge and cloud. As a Senior Formal Verification Engineer, you will play a critical role in ensuring the functional correctness of complex digital designs using advanced formal methods. This position offers the opportunity to work on cutting-edge technology and shape verification strategies for AI SoCs.Key ResponsibilitiesOwn formal verification strategy and execution for complex SoC IP blocks and subsystems.Develop and maintain formal verification environments using SystemVerilog Assertions (SVA) and industry-standard formal tools.Write and review formal properties, constraints, and coverage goals to achieve exhaustive verification.Collaborate with design and simulation teams to identify corner cases and complement dynamic verification.Drive formal sign-off, including convergence analysis and coverage closure.Contribute to pre-silicon verification, chip bring-up, and post-silicon debug support.Mentor junior engineers and establish best practices for formal verification methodologyAdditional ResponsibilitiesDefine and develop scalable, reusable verification plans for block, subsystem, and SoC levels.Execute verification plans and run emulation and system simulation models to validate design, analyze power/performance, and uncover bugs.Debug and root-cause issues in the presilicon environment; implement corrective measures.Collaborate with architects, RTL developers, and physical design teams to improve verification of complex features.Document test plans and lead technical reviews with design and architecture teams.Incorporate and execute security verification activities within regression and debug tests.Maintain and enhance existing functional verification infrastructure and methodology.Apply learnings from post-silicon validation to improve coverage and quality for future products.Qualifications:Minimum QualificationsBasic Qualifications• Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science with 10+ years of related experience.• 7+ years of experience in ASIC/SoC verification with at least 3+ years focused on formal verification.Preferred Qualifications • Expertise in formal verification methodologies and tools (e.g., JasperGold, VC Formal, Questa Formal).• Strong knowledge of System Verilog Assertions (SVA) and property-based verification.• Deep understanding of digital design concepts, clock domain crossings, and low-power design techniques.• Familiarity with UVM-based simulation environments and how formal complements dynamic verification.• Scripting skills (Python, TCL, Perl) for automation and flow optimization.• Ability to lead projects, work cross-functionally, and deliver under tight schedules.• Strong analytical skills, attention to detail, and a collaborative mindset.Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, FolsomAdditional Locations:US, California, Santa Clara, US, Oregon, Hillsboro, US, Texas, AustinBusiness group:Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, California, Folsom; US, Oregon, Hillsboro; US, California, Santa Clara; US, Texas, AustinType: Full time

Job Details:Job Description: Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision.Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet.Life at Intel:This position is in the Logic Technology Development team working in one of the most advanced semiconductor process technologies in the world. You will design, execute, and analyze cutting edge experiments to develop the process of the next technologies to come into the market. Come join us and help shape the future of the semiconductor process for decades to come.What we offer: We foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results. We give you opportunities to transform technology and create a better future by delivering products. We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and many more creative perks that make Intel a Great Place to Work. What we do: The Logic Technology Development (LTD) organization delivers the latest process technology innovations to drive Intel's amazing product roadmap. What you will be considered for:LTD Module Development Engineers are responsible for leading scientific research enabling the manufacture of innovative device architectures but not limited to: Lead scientific research enabling the manufacture of innovative device architectures coupled with the realization of these architectures.Designing, executing, and analyzing experiments necessary to meet engineering specifications for their process.Participate in the development of intellectual property.Integrate the many individual steps necessary for the manufacture of complex microprocessors.Ramp to manufacturing volumes to demonstrate the technology meets requirements while simultaneously transferring the technology to counterparts in manufacturing via the Copy Exactly Methodology.The successful candidate must demonstrate:Strong communication skills and the ability to work effectively in cross-functional development teams. Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The requirements listed would be obtained through a combination of industry-relevant job experience, internship experience, and/or classes/research, and post-doctoral research.Minimum Qualifications – What You BringEducation: Bachelor's degree with 12+ years, Master's degree with 10+ years, or Ph.D. with 7+ years of experience in Materials Science, Chemical Engineering, Chemistry, Physics, Mechanical Engineering, Electrical Engineering, or a related STEM discipline.7+ years of hands-on lithography industry experience.Current experience in advanced node overlay development processes.Proven ability to troubleshoot process impacts on overlay mark performance.Experience with integrated process development to co-optimize process flows and overlay mark design.Demonstrated proficiency in Design of Experiments (DOE), Statistical Process Control (SPC), and data analysis.Preferred Qualifications — Where Your Background ShinesExperience driving integrated process change methodologies based on overlay impact analysis.Direct overlay equipment development experience and vendor engagement.Hands-on experience with ASML EUV and DUV scanner platforms.Strong capability to troubleshoot complex process and production issues at advanced nodes.Deep working knowledge of lithography equipment operation, including automation and process control systems. Familiarity with factory automation or manufacturing execution and control systems.We invite you to bring your skills, ideas, and aspirations to Intel, where you will find the perfect environment to grow and make an impact. Apply today to become part of a team that shapes the future of workplace and real estate services. Join us in advancing memory systems technology and delivering innovative solutions that will shape the future of computing.Interview Tips: Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $155,520.00-255,200.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, HillsboroType: Full time

Job Details:Job Description: Identifies business requirements, functional and system specifications that meet business user requirements, maps them to systems capabilities and recommends technical solutions. Configures system settings and options, plans and executes unit, integration and acceptance testing, and creates systems specifications. Identifies test scenarios and cases, executes test cases, documents test results, test scripts and provides quality assurance results to the business. Examines current business procedures, system practices and IT modification design and recommends new improved ones. Designs new computer programs and systems by analyzing business requirements, constructing workflow charts and diagrams, studying system capabilities and writing specifications. Performs troubleshooting, solves complex bug issues in production systems or applications, and collaborates with subject matter experts on issues. Anticipates complex issues and discusses within and outside of project team to maintain open communication. Serves as a technical lead on a subsystem or small feature(s), manages projects of small to medium size and complexity, performs tasks, and applies expertise in subject area to meet deadlines.Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.This position is not eligible for Intel immigration sponsorship.Minimum Qualifications:Bachelor's Degree in Computer Engineering, Computer Science or other Engineering related field and 6+ years of experience ORMaster's Degree in Computer Engineering, Computer Science or other Engineering related field and 4+ years of experience ORPhD in Computer Engineering, Computer Science or other Engineering related field and 2+ years of experienceExperience with end-to-end ERP implementation projects as SAP MM/PP consultant or functional analyst.Experience with SAP Materials Management (MM)/ Production Planning (PP) configuration (e.g.: requisitions, purchasing, scheduling agreements, subcontracting, MRP, inventory management, stock transfers, planning procedures, process orders, pegging in production planning).Prior business process reengineering, application solution design and requirement engineering.Experience working in Agile environment with Scrum practices.Preferred Qualifications:Semiconductor/Manufacturing industry experienceSAP MM CertifiedSAP PP CertifiedExperience with integrating SAP ERP to other planning applications like Blue Yonder (BY/JDA) is desirable.Experience in S4 HANA/Reporting Tools preferable.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, California, Folsom, US, California, Santa Clara, US, Oregon, HillsboroBusiness group:The Corporate Planning Group (CPG) is the strategic heartbeat of Intel, acting as catalyst for innovation and transformation, guiding the company towards achieving its vision and maintaining a competitive edge in the marketplace. CPG exists to build a comprehensive operating plan that leverages internal and external manufacturing for Intel's growth. We emphasize data-driven innovation and results, ensuring we meet customer demands and financial targets. Join CPG to be part of a forward-looking group that is not just planning for tomorrow, but redefining it.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $124,110.00-243,400.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Arizona, Phoenix; US, Oregon, Hillsboro; US, California, Folsom; US, California, Santa ClaraType: Full time

Job Details:Job Description: The Role and ImpactIntel Foundry is seeking a technical manager to serve as a senior technical authority within Logic Technology Development, LTD Wet Etch and Cleans. This is a hands-on individual contributor role with potential for limited technical mentorship, focused on wet etch process development that directly enables advanced logic nodes and High Volume Manufacturing, HVM. The successful candidate will bring external foundry experience and help elevate Intel's wet etch capability by applying proven Research and Development, RD, to HVM development practices used by leading logic foundries.Key ResponsibilitiesOwn wet etch and cleans development across one or more areas:Process developmentEquipment and process interaction developmentLead development from Research and Development TD through HVM deploymentDrive innovation to support advanced logic nodes, 14A and 10AAct as a technical authority, influencing direction through data and expertiseCollaborate with adjacent module and integration teams while maintaining clear ownership of wet etch deliverablesMentor and guide engineers through technical leadership, not people managementRequired Skills and ExperienceProven experience in a logic HVM foundry environmentHands on wet etch process development beyond fab sustainingAbility to clearly articulate technical ownership and impactPreferred Skills and ExperiencePrior roles in Technology Development, Pathfinding, Research and DevelopmentExperience transitioning solutions from Research and Development, RD, to HVMAdvanced node experience in 5nm and lower; ideally 2nm and/or 1.6nm equivalentsBackground at leading logic foundriesWhy This Role MattersAddresses a recognized capability gap vs. competitorsDirect impact on Intel most advanced logic technologiesOpportunity to shape wet etch and cleans strategy, not just executeHigh visibility, high technical ownership, meaningful external impactQualifications:BS, MS, or PhD degree in a relevant technical field15+ years of wet etch and cleans experience in semiconductor logic process developmentJob Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Business group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $191,220.00-269,950.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, HillsboroType: Full time

Job Details:Job Description: The Role and ImpactAs a Principal Engineer specializing in Silicon SoC Architecture at Intel, you will be at the forefront of designing and driving next-generation System-on-Chip (SoC) architectures that define the future of datacenter and agentic computing. This is a role of strategic importance, where your expertise will shape the technological direction of Intel and influence the industry at large. You will lead the end-to-end architecture and development of modular, scalable, and highly optimized SoCs that serve the needs of diverse segments, from high-performance computing to ultra-low power solutions. By innovating new architectural approaches and mentoring other technical leaders, you will play a pivotal role in delivering leadership solutions that power the world's most impactful technologies.Key ResponsibilitiesDefine and develop end-to-end SoC architectures, including hardware, firmware, and functional specifications, to meet connectivity, configuration, performance, timing, power, and area goals.Drive the evaluation, integration, and optimization of existing IP blocks into new SoCs, defining gaskets or glue logic as necessary.Explore and implement novel architectural features for next-generation products, ensuring the delivery of high-quality, scalable designs.Develop, execute, and analyze tests, test plans, and testing infrastructure to validate new architectures and features, using advanced statistics and data analysis to benchmark performance and identify improvements.Collaborate with architects, design engineers, system engineers, and verification engineers to ensure seamless SoC design and address development constraints.Review and influence cross-functional roadmaps, define technology targets, and contribute to the long-term innovation strategy for future SoCs.Act as a domain expert, providing technical leadership across the organization and the industry.Mentor and develop other technical leaders while fostering a culture of innovation, collaboration, and excellence in alignment with Intel's core values.Deep expertise in SoC architecture development methodologies, system architecture, and microarchitecture.Proven experience in defining architecture features, registers specifications, and SoC development.Proficiency in computer architecture fundamentals, CPU architecture, and systems thinking.Demonstrated ability in problem solving and evaluating feasibility tradeoffs to drive SoC optimization.Qualifications:Minimum QualificationsBachelor's or BS degree in Electrical Engineering, Computer Engineering, or a related field, with 12+ years of experience. ORMaster's degree in Electrical Engineering, Computer Engineering, or a related field, with 8+ years of experience. ORPhD in Electrical Engineering, Computer Engineering, or a related field, with 6+ years of experience.Preferred QualificationsDemonstrated track record of innovation, including conceptualizing and specifying advanced microarchitectures for future products.Experience leading cross-functional teams and contributing to technical strategies.Strong coaching and mentoring skills to develop leadership within the organization.Expertise in benchmarking, performance analysis, and advanced statistical modeling.Knowledge of emerging trends and technologies in computing, with a strategic vision for the evolution of SoC architectures.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, California, Folsom, US, Colorado, Fort Collins, US, Massachusetts, Beaver Brook, US, Oregon, Hillsboro, US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $220,920.00-361,480.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 02/22/2027ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, California, Santa Clara; US, Colorado, Fort Collins; US, Massachusetts, Beaver Brook; US, Oregon, Hillsboro; US, California, Folsom; US, Texas, AustinType: Full time

Job Details:Job Description: Software and AI (SAI) organization is looking for a software development engineer to work on oneDNN project ( ). oneDNN is a complex cross-platform open-source software project focusing on neural network performance. oneDNN is a critical and highly visible component of Intel AI strategy, powering key AI applications including OpenVINO, Tensorflow, Pytorch, ONNX Runtime, and more. In this role, you will be responsible for design, development, and maintenance of new functionality in oneDNN to enable performance critical portions of AI workloads. In this role you will be supporting software developers optimizing AI frameworks and workloads for Intel CPUs and GPUs, as well as cross-platform ecosystem of AI software developers contributing to oneDNN.Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.Minimum requirements: Master’s degree in Mathematics, Physics, Computer Science, or a relevant STEM field. ORPh.D. degree in Mathematics, Physics, Computer Science, or a relevant STEM field.5+ years of experience in the following areas:C and C++Maintaining or contributing to open-source software projectsSoftware libraries design and architectureImplementation of linear algebra algorithms (functions from BLAS, LAPACK, or PyTorch)Performance engineering and software performance optimizationsFloating point arithmetic and numerical stabilitySoftware development on LinuxLow-level performance optimizations using CUDA, x86 assembly or intrinsics, or OpenCLPreferred qualifications:3 years+ Machine learning and deep learning algorithms or High-performance computing (HPC) applications development3 year+ Floating point implementations of transcendental functions (sin, cos, tanh, elu, etc)1 year+ Algorithms for non-IEEE low precision data types (bfloat16, fp8, fp4)1 year+ AI assisted software developmentRequirements listed would be obtained through a combination of industry relevant job experience, internship experiences and/or schoolwork/classes/research.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, California, FolsomBusiness group:The Software Team drives customer value by enabling differentiated experiences through leadership AI technologies and foundational software stacks, products, and services. The group is responsible for developing the holistic strategy for client and data center software in collaboration with OSVs, ISVs, developers, partners and OEMs. The group delivers specialized NPU IP to enable the AI PC and GPU IP to support all of Intel's market segments. The group also has HW and SW engineering experts responsible for delivering IP, SOCs, runtimes, and platforms to support the CPU and GPU/accelerator roadmap, inclusive of integrated and discrete graphics.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $170,500.00-315,490.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, Hillsboro; US, California, FolsomType: Full time

Job Details:Job Description: Business Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art, from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Foundry Organization are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth. Please Note: This role is a Hybrid role that requires 4 days onsite, 1 day working from home. About the Role Develops innovative solutions to support Intel's future technology roadmap. Drives design, simulation, development, and implementation activities for scientific research projects leveraging device physics, materials, chemistry, and process innovations to drive research on novel devices, packages, interconnects, circuits, and systems. Evaluates device, circuit, and system tradeoffs to identify solutions for continued performance improvements. Drives process and equipment research to enable device miniaturization and high-volume manufacturing. Provides process solutions across fabrication modules including lithography, etch, CVD, PVD, bonding, and CMP. Plans and executes experiments across fabrication sites in collaboration with cross-functional teams; benchmarks results against industry standards. Develops and validates models and measurements to advance device physics and packaging understanding. Manages vendor relationships supporting R&D across devices, packages, and interconnects. Mentors academic and industry partners to strengthen Intel's research pipeline. Qualifications:The Minimum qualifications listed below are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience, academic projects, and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum QualificationsPhD degree in Materials Science, Chemistry, Physics, Chemical Engineering, Electrical Engineering or related field. Lead- and co-authored research publications in highly regarded, peer reviewed scientific journals and/or Conferences. 6+ months of experience with one or more of the following (having more than one will be preferred): Developing/maintaining deposition processes. Use of multiple metrologies to efficiently drive process improvement. Developing/maintaining process hardware. Project development in a team environment.Preferred QualificationsThorough understanding of how to monitor and control processes. Working knowledge of standard semiconductor processes. Experience with modifying and controlling film properties to improve ease of integration. Experience with electrical test metrics and integration schemes. Experience with automating common tasks within automation systems. Demonstrated materials improvements from utilization of advanced AI/ML techniques. Previous experience in running vendor research collaborations. Job Type:College GradShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Oregon, HillsboroType: Full time

Job Details:Job Description: The Role and ImpactAs a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high-quality logic designs, coding at the register transfer level (RTL), and optimizing performance to deliver energy-efficient and secure solutions. Your contributions will directly impact Intel's ability to deliver innovative and market-leading semiconductor technologies.Business GroupThis position resides within Intel's leading-edge silicon engineering group, which is dedicated to designing, developing, and scaling advanced semiconductor solutions for a wide range of applications. This team focuses on integrating cutting-edge technology, ensuring quality standards, and driving innovation that supports Intel's commitment to delivering world-class products and solutions.Key ResponsibilitiesDevelop logic designs and RTL code for SoC blocks and subsystems aligned with architectural and microarchitectural specificationsIntegrate IP blocks and subsystems into comprehensive full-chip SoC designsParticipate in the definition of architecture and microarchitecture features of the blocks being designedOptimize logic designs to meet power, performance, area, and timing goals using advanced tools and strategiesConduct quality checks to ensure design integrity and readiness for physical implementationReview verification plans to confirm accuracy in tested design features and implement corrective measures for failing RTL testsApply secure development practices to address security models and objectives in hardware designCollaborate with IP providers to integrate and validate IPs at the SoC levelEnsure quality assurance compliance for smooth IP/SoC handoff and design readinessProfessional Traits for SuccessTo thrive in this role, you should demonstrate the following:Collaborative Communicator — Proven ability to work across teams and convey complex technical ideas clearly and effectivelyInnovative Thinker — Enthusiasm for staying ahead of industry trends and applying creative approaches to SoC design challengesExecution-Driven — Demonstrated success in delivering complex projects from concept through implementationQualifications:Minimum QualificationsBachelor's degree in Electrical Engineering, Computer Engineering, or a related specialized field with 4+ years of hands-on experience in logic design, RTL development, and microarchitecture implementation, or Master's degree with 3+ years of experience in the same fieldsThe years of experience must include:RTL coding languages such as VerilogExpertise in SoC integration, SoC clocking, and low-power design methodologiesExperience in strategies for timing, power convergence, and physical implementation optimizationHands-on experience with Clock Domain Crossing techniques and Network-on-Chip (NoC) architecturesWorking experience with AMBA protocols such as CHI, AXI, AHB, and APBPreferred QualificationsHands-on experience from spec to timing closure in at least one SoC/ASIC designWe encourage you to bring your expertise and passion for innovation to Intel, where your contributions will shape the future of semiconductor technology and empower industries worldwide.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, Texas, Austin; US, California, Santa Clara; US, Oregon, HillsboroType: Full time